diff options
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/radeon_uvd.c | 18 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/radeon_vce.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/radeon_vcn_dec.c | 6 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/radeon_video.c | 14 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/radeon_video.h | 2 |
6 files changed, 21 insertions, 24 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 8e2fa6d96cd..f45025883e8 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -127,7 +127,6 @@ enum { #define SI_MAX_VARIABLE_THREADS_PER_BLOCK 1024 -struct r600_common_context; struct r600_perfcounters; struct tgsi_shader_info; struct r600_qbo_state; diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c index 78ced179bb4..3a680a32449 100644 --- a/src/gallium/drivers/radeon/radeon_uvd.c +++ b/src/gallium/drivers/radeon/radeon_uvd.c @@ -1363,8 +1363,8 @@ struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *conte const struct pipe_video_codec *templ, ruvd_set_dtb set_dtb) { - struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws; - struct r600_common_context *rctx = (struct r600_common_context*)context; + struct si_context *sctx = (struct si_context*)context; + struct radeon_winsys *ws = sctx->b.ws; unsigned dpb_size; unsigned width = templ->width, height = templ->height; unsigned bs_buf_size; @@ -1396,7 +1396,7 @@ struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *conte if (!dec) return NULL; - if (rctx->screen->info.drm_major < 3) + if (sctx->screen->info.drm_major < 3) dec->use_legacy = true; dec->base = *templ; @@ -1411,12 +1411,12 @@ struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *conte dec->base.end_frame = ruvd_end_frame; dec->base.flush = ruvd_flush; - dec->stream_type = profile2stream_type(dec, rctx->family); + dec->stream_type = profile2stream_type(dec, sctx->b.family); dec->set_dtb = set_dtb; dec->stream_handle = si_vid_alloc_stream_handle(); dec->screen = context->screen; dec->ws = ws; - dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL); + dec->cs = ws->cs_create(sctx->b.ctx, RING_UVD, NULL, NULL); if (!dec->cs) { RVID_ERR("Can't get command submission context.\n"); goto error; @@ -1424,7 +1424,7 @@ struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *conte for (i = 0; i < 16; i++) dec->render_pic_list[i] = NULL; - dec->fb_size = (rctx->family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA : + dec->fb_size = (sctx->b.family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA : FB_BUFFER_SIZE; bs_buf_size = width * height * (512 / (16 * 16)); for (i = 0; i < NUM_BUFFERS; ++i) { @@ -1457,7 +1457,7 @@ struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *conte si_vid_clear_buffer(context, &dec->dpb); } - if (dec->stream_type == RUVD_CODEC_H264_PERF && rctx->family >= CHIP_POLARIS10) { + if (dec->stream_type == RUVD_CODEC_H264_PERF && sctx->b.family >= CHIP_POLARIS10) { unsigned ctx_size = calc_ctx_size_h264_perf(dec); if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) { RVID_ERR("Can't allocated context buffer.\n"); @@ -1466,7 +1466,7 @@ struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *conte si_vid_clear_buffer(context, &dec->ctx); } - if (rctx->family >= CHIP_POLARIS10 && rctx->screen->info.drm_minor >= 3) { + if (sctx->b.family >= CHIP_POLARIS10 && sctx->screen->info.drm_minor >= 3) { if (!si_vid_create_buffer(dec->screen, &dec->sessionctx, UVD_SESSION_CONTEXT_SIZE, PIPE_USAGE_DEFAULT)) { @@ -1476,7 +1476,7 @@ struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *conte si_vid_clear_buffer(context, &dec->sessionctx); } - if (rctx->family >= CHIP_VEGA10) { + if (sctx->b.family >= CHIP_VEGA10) { dec->reg.data0 = RUVD_GPCOM_VCPU_DATA0_SOC15; dec->reg.data1 = RUVD_GPCOM_VCPU_DATA1_SOC15; dec->reg.cmd = RUVD_GPCOM_VCPU_CMD_SOC15; diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index c84103e0acc..9eac217c1c0 100644 --- a/src/gallium/drivers/radeon/radeon_vce.c +++ b/src/gallium/drivers/radeon/radeon_vce.c @@ -389,7 +389,7 @@ struct pipe_video_codec *si_vce_create_encoder(struct pipe_context *context, rvce_get_buffer get_buffer) { struct si_screen *sscreen = (struct si_screen *)context->screen; - struct r600_common_context *rctx = (struct r600_common_context*)context; + struct si_context *sctx = (struct si_context*)context; struct rvce_encoder *enc; struct pipe_video_buffer *tmp_buf, templat = {}; struct radeon_surf *tmp_surf; @@ -437,7 +437,7 @@ struct pipe_video_codec *si_vce_create_encoder(struct pipe_context *context, enc->screen = context->screen; enc->ws = ws; - enc->cs = ws->cs_create(rctx->ctx, RING_VCE, rvce_cs_flush, enc); + enc->cs = ws->cs_create(sctx->b.ctx, RING_VCE, rvce_cs_flush, enc); if (!enc->cs) { RVID_ERR("Can't get command submission context.\n"); goto error; diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index f83e9e5fc47..db4e24f9d76 100644 --- a/src/gallium/drivers/radeon/radeon_vcn_dec.c +++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c @@ -1198,8 +1198,8 @@ static void radeon_dec_flush(struct pipe_video_codec *decoder) struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context, const struct pipe_video_codec *templ) { - struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws; - struct r600_common_context *rctx = (struct r600_common_context*)context; + struct si_context *sctx = (struct si_context*)context; + struct radeon_winsys *ws = sctx->b.ws; unsigned width = templ->width, height = templ->height; unsigned dpb_size, bs_buf_size, stream_type = 0; struct radeon_decoder *dec; @@ -1253,7 +1253,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context, dec->stream_handle = si_vid_alloc_stream_handle(); dec->screen = context->screen; dec->ws = ws; - dec->cs = ws->cs_create(rctx->ctx, RING_VCN_DEC, NULL, NULL); + dec->cs = ws->cs_create(sctx->b.ctx, RING_VCN_DEC, NULL, NULL); if (!dec->cs) { RVID_ERR("Can't get command submission context.\n"); goto error; diff --git a/src/gallium/drivers/radeon/radeon_video.c b/src/gallium/drivers/radeon/radeon_video.c index d80410d51b3..3ae1d21cf1f 100644 --- a/src/gallium/drivers/radeon/radeon_video.c +++ b/src/gallium/drivers/radeon/radeon_video.c @@ -119,9 +119,9 @@ error: /* clear the buffer with zeros */ void si_vid_clear_buffer(struct pipe_context *context, struct rvid_buffer* buffer) { - struct r600_common_context *rctx = (struct r600_common_context*)context; + struct si_context *sctx = (struct si_context*)context; - rctx->dma_clear_buffer(context, &buffer->res->b.b, 0, + sctx->b.dma_clear_buffer(context, &buffer->res->b.b, 0, buffer->res->buf->size, 0); context->flush(context, NULL, 0); } @@ -130,25 +130,23 @@ void si_vid_clear_buffer(struct pipe_context *context, struct rvid_buffer* buffe * join surfaces into the same buffer with identical tiling params * sumup their sizes and replace the backend buffers with a single bo */ -void si_vid_join_surfaces(struct r600_common_context *rctx, +void si_vid_join_surfaces(struct si_context *sctx, struct pb_buffer** buffers[VL_NUM_COMPONENTS], struct radeon_surf *surfaces[VL_NUM_COMPONENTS]) { - struct radeon_winsys* ws; + struct radeon_winsys *ws = sctx->b.ws;; unsigned best_tiling, best_wh, off; unsigned size, alignment; struct pb_buffer *pb; unsigned i, j; - ws = rctx->ws; - for (i = 0, best_tiling = 0, best_wh = ~0; i < VL_NUM_COMPONENTS; ++i) { unsigned wh; if (!surfaces[i]) continue; - if (rctx->chip_class < GFX9) { + if (sctx->b.chip_class < GFX9) { /* choose the smallest bank w/h for now */ wh = surfaces[i]->u.legacy.bankw * surfaces[i]->u.legacy.bankh; if (wh < best_wh) { @@ -165,7 +163,7 @@ void si_vid_join_surfaces(struct r600_common_context *rctx, /* adjust the texture layer offsets */ off = align(off, surfaces[i]->surf_alignment); - if (rctx->chip_class < GFX9) { + if (sctx->b.chip_class < GFX9) { /* copy the tiling parameters */ surfaces[i]->u.legacy.bankw = surfaces[best_tiling]->u.legacy.bankw; surfaces[i]->u.legacy.bankh = surfaces[best_tiling]->u.legacy.bankh; diff --git a/src/gallium/drivers/radeon/radeon_video.h b/src/gallium/drivers/radeon/radeon_video.h index 64ee4540886..eee550c44b1 100644 --- a/src/gallium/drivers/radeon/radeon_video.h +++ b/src/gallium/drivers/radeon/radeon_video.h @@ -62,7 +62,7 @@ void si_vid_clear_buffer(struct pipe_context *context, struct rvid_buffer* buffe /* join surfaces into the same buffer with identical tiling params sumup their sizes and replace the backend buffers with a single bo */ -void si_vid_join_surfaces(struct r600_common_context *rctx, +void si_vid_join_surfaces(struct si_context *sctx, struct pb_buffer** buffers[VL_NUM_COMPONENTS], struct radeon_surf *surfaces[VL_NUM_COMPONENTS]); |