diff options
Diffstat (limited to 'src/gallium/drivers/radeon')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 18 |
2 files changed, 23 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 75dc5acc247..b411b23ba87 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -265,6 +265,14 @@ struct r600_texture { bool non_disp_tiling; /* R600-Cayman only */ + /* Whether the texture is a displayable back buffer and needs DCC + * decompression, which is expensive. Therefore, it's enabled only + * if statistics suggest that it will pay off and it's allocated + * separately. Limited to target == 2D and last_level == 0. If enabled, + * dcc_offset contains the absolute GPUVM address, not the relative one. + */ + struct r600_resource *dcc_separate_buffer; + /* Counter that should be non-zero if the texture is bound to a * framebuffer. Implemented in radeonsi only. */ diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 50f50257ebf..c45c5f29fb8 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -387,6 +387,8 @@ static bool r600_texture_discard_dcc(struct r600_common_screen *rscreen, if (!r600_can_disable_dcc(rtex)) return false; + assert(rtex->dcc_separate_buffer == NULL); + /* Disable DCC. */ rtex->dcc_offset = 0; @@ -564,6 +566,7 @@ static void r600_texture_destroy(struct pipe_screen *screen, r600_resource_reference(&rtex->cmask_buffer, NULL); } pb_reference(&resource->buf, NULL); + r600_resource_reference(&rtex->dcc_separate_buffer, NULL); FREE(rtex); } @@ -1800,12 +1803,21 @@ void vi_dcc_clear_level(struct r600_common_context *rctx, struct r600_texture *rtex, unsigned level, unsigned clear_value) { - struct pipe_resource *dcc_buffer = &rtex->resource.b.b; - uint64_t dcc_offset = rtex->dcc_offset + - rtex->surface.level[level].dcc_offset; + struct pipe_resource *dcc_buffer; + uint64_t dcc_offset; assert(rtex->dcc_offset && rtex->surface.level[level].dcc_enabled); + if (rtex->dcc_separate_buffer) { + dcc_buffer = &rtex->dcc_separate_buffer->b.b; + dcc_offset = 0; + } else { + dcc_buffer = &rtex->resource.b.b; + dcc_offset = rtex->dcc_offset; + } + + dcc_offset += rtex->surface.level[level].dcc_offset; + rctx->clear_buffer(&rctx->b, dcc_buffer, dcc_offset, rtex->surface.level[level].dcc_fast_clear_size, clear_value, R600_COHERENCY_CB_META); |