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-rw-r--r--src/gallium/drivers/radeon/Makefile.sources86
1 files changed, 86 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources
new file mode 100644
index 00000000000..96189e75a17
--- /dev/null
+++ b/src/gallium/drivers/radeon/Makefile.sources
@@ -0,0 +1,86 @@
+
+GENERATED_SOURCES := \
+ R600ShaderPatterns.td \
+ R600RegisterInfo.td \
+ AMDGPUInstrEnums.td \
+ SIRegisterInfo.td \
+ SIRegisterGetHWRegNum.inc \
+ AMDILGenRegisterInfo.inc \
+ AMDILGenInstrInfo.inc \
+ AMDILGenAsmWriter.inc \
+ AMDILGenDAGISel.inc \
+ AMDILGenCallingConv.inc \
+ AMDILGenSubtargetInfo.inc \
+ AMDILGenEDInfo.inc \
+ AMDILGenIntrinsics.inc \
+ AMDILGenCodeEmitter.inc \
+ AMDGPUInstrEnums.h.include \
+ AMDGPUInstrEnums.include
+
+CPP_SOURCES := \
+ AMDIL7XXDevice.cpp \
+ AMDIL7XXIOExpansion.cpp \
+ AMDIL789IOExpansion.cpp \
+ AMDILAsmBackend.cpp \
+ AMDILBarrierDetect.cpp \
+ AMDILCFGStructurizer.cpp \
+ AMDILDevice.cpp \
+ AMDILDeviceInfo.cpp \
+ AMDILEGIOExpansion.cpp \
+ AMDILEvergreenDevice.cpp \
+ AMDILELFWriterInfo.cpp \
+ AMDILFrameLowering.cpp \
+ AMDILGlobalManager.cpp \
+ AMDILImageExpansion.cpp \
+ AMDILInliner.cpp \
+ AMDILInstrInfo.cpp \
+ AMDILIntrinsicInfo.cpp \
+ AMDILIOExpansion.cpp \
+ AMDILISelDAGToDAG.cpp \
+ AMDILISelLowering.cpp \
+ AMDILKernelManager.cpp \
+ AMDILLiteralManager.cpp \
+ AMDILMachineFunctionInfo.cpp \
+ AMDILMachinePeephole.cpp \
+ AMDILMCCodeEmitter.cpp \
+ AMDILModuleInfo.cpp \
+ AMDILNIDevice.cpp \
+ AMDILPeepholeOptimizer.cpp \
+ AMDILPointerManager.cpp \
+ AMDILPrintfConvert.cpp \
+ AMDILRegisterInfo.cpp \
+ AMDILSIDevice.cpp \
+ AMDILSubtarget.cpp \
+ AMDILTargetMachine.cpp \
+ AMDILUtilityFunctions.cpp \
+ AMDGPUTargetMachine.cpp \
+ AMDGPUISelLowering.cpp \
+ AMDGPUConvertToISA.cpp \
+ AMDGPULowerShaderInstructions.cpp \
+ AMDGPUReorderPreloadInstructions.cpp \
+ AMDGPUInstrInfo.cpp \
+ AMDGPURegisterInfo.cpp \
+ AMDGPUUtil.cpp \
+ R600CodeEmitter.cpp \
+ R600ISelLowering.cpp \
+ R600InstrInfo.cpp \
+ R600KernelParameters.cpp \
+ R600LowerInstructions.cpp \
+ R600LowerShaderInstructions.cpp \
+ R600RegisterInfo.cpp \
+ SIAssignInterpRegs.cpp \
+ SICodeEmitter.cpp \
+ SIConvertToISA.cpp \
+ SIInstrInfo.cpp \
+ SIISelLowering.cpp \
+ SILowerShaderInstructions.cpp \
+ SIMachineFunctionInfo.cpp \
+ SIPropagateImmReads.cpp \
+ SIRegisterInfo.cpp \
+ MCTargetDesc/AMDILMCAsmInfo.cpp \
+ MCTargetDesc/AMDILMCTargetDesc.cpp \
+ TargetInfo/AMDILTargetInfo.cpp \
+ radeon_llvm_emit.cpp
+
+C_SOURCES := \
+ radeon_setup_tgsi_llvm.c