1 files changed, 8 insertions, 8 deletions

diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
index f2672ca6e8d..6b50128c9fc 100644
--- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.cpp
@@ -55,7 +55,7 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,
 
 {
   // TLInfo uses InstrInfo so it must be initialized after.
-  if (Subtarget.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
+  if (Subtarget.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
     InstrInfo = new R600InstrInfo(*this);
     TLInfo = new R600TargetLowering(*this);
   } else {
@@ -82,7 +82,7 @@ bool AMDGPUTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
   std::string gpu = STM.getDeviceName();
   if (gpu == "SI") {
     PM.add(createSICodeEmitterPass(Out));
-  } else if (Subtarget.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
+  } else if (Subtarget.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
     PM.add(createR600CodeEmitterPass(Out));
   } else {
     abort();
@@ -120,7 +120,7 @@ bool
 AMDGPUPassConfig::addPreISel()
 {
   const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
-  if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
+  if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
     PM->add(createR600KernelParametersPass(
                      getAMDGPUTargetMachine().getTargetData()));
   }
@@ -128,15 +128,15 @@ AMDGPUPassConfig::addPreISel()
 }
 
 bool AMDGPUPassConfig::addInstSelector() {
-  PM->add(createAMDILPeepholeOpt(*TM));
-  PM->add(createAMDILISelDag(getAMDGPUTargetMachine()));
+  PM->add(createAMDGPUPeepholeOpt(*TM));
+  PM->add(createAMDGPUISelDag(getAMDGPUTargetMachine()));
   return false;
 }
 
 bool AMDGPUPassConfig::addPreRegAlloc() {
   const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
 
-  if (ST.device()->getGeneration() > AMDILDeviceInfo::HD6XXX) {
+  if (ST.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
     PM->add(createSIAssignInterpRegsPass(*TM));
   }
   PM->add(createAMDGPUConvertToISAPass(*TM));
@@ -152,8 +152,8 @@ bool AMDGPUPassConfig::addPreSched2() {
 }
 
 bool AMDGPUPassConfig::addPreEmitPass() {
-  PM->add(createAMDILCFGPreparationPass(*TM));
-  PM->add(createAMDILCFGStructurizerPass(*TM));
+  PM->add(createAMDGPUCFGPreparationPass(*TM));
+  PM->add(createAMDGPUCFGStructurizerPass(*TM));
 
   return false;
 }