diff options
Diffstat (limited to 'src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp')
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp | 118 |
1 files changed, 0 insertions, 118 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp b/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp index 2af036740ae..03a647e4387 100644 --- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp +++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.cpp @@ -97,124 +97,6 @@ bool AMDGPUInstrInfo::getNextBranchInstr(MachineBasicBlock::iterator &iter, return false; } -bool AMDGPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, - MachineBasicBlock *&TBB, - MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond, - bool AllowModify) const { - bool retVal = true; - return retVal; - MachineBasicBlock::iterator iter = MBB.begin(); - if (!getNextBranchInstr(iter, MBB)) { - retVal = false; - } else { - MachineInstr *firstBranch = iter; - if (!getNextBranchInstr(++iter, MBB)) { - if (firstBranch->getOpcode() == AMDGPU::BRANCH) { - TBB = firstBranch->getOperand(0).getMBB(); - firstBranch->eraseFromParent(); - retVal = false; - } else { - TBB = firstBranch->getOperand(0).getMBB(); - FBB = *(++MBB.succ_begin()); - if (FBB == TBB) { - FBB = *(MBB.succ_begin()); - } - Cond.push_back(firstBranch->getOperand(1)); - retVal = false; - } - } else { - MachineInstr *secondBranch = iter; - if (!getNextBranchInstr(++iter, MBB)) { - if (secondBranch->getOpcode() == AMDGPU::BRANCH) { - TBB = firstBranch->getOperand(0).getMBB(); - Cond.push_back(firstBranch->getOperand(1)); - FBB = secondBranch->getOperand(0).getMBB(); - secondBranch->eraseFromParent(); - retVal = false; - } else { - assert(0 && "Should not have two consecutive conditional branches"); - } - } else { - MBB.getParent()->viewCFG(); - assert(0 && "Should not have three branch instructions in" - " a single basic block"); - retVal = false; - } - } - } - return retVal; -} - -unsigned int AMDGPUInstrInfo::getBranchInstr(const MachineOperand &op) const { - const MachineInstr *MI = op.getParent(); - - switch (MI->getDesc().OpInfo->RegClass) { - default: // FIXME: fallthrough?? - case AMDGPU::GPRI32RegClassID: return AMDGPU::BRANCH_COND_i32; - case AMDGPU::GPRF32RegClassID: return AMDGPU::BRANCH_COND_f32; - }; -} - -unsigned int -AMDGPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, - MachineBasicBlock *TBB, - MachineBasicBlock *FBB, - const SmallVectorImpl<MachineOperand> &Cond, - DebugLoc DL) const -{ - assert(TBB && "InsertBranch must not be told to insert a fallthrough"); - for (unsigned int x = 0; x < Cond.size(); ++x) { - Cond[x].getParent()->dump(); - } - if (FBB == 0) { - if (Cond.empty()) { - BuildMI(&MBB, DL, get(AMDGPU::BRANCH)).addMBB(TBB); - } else { - BuildMI(&MBB, DL, get(getBranchInstr(Cond[0]))) - .addMBB(TBB).addReg(Cond[0].getReg()); - } - return 1; - } else { - BuildMI(&MBB, DL, get(getBranchInstr(Cond[0]))) - .addMBB(TBB).addReg(Cond[0].getReg()); - BuildMI(&MBB, DL, get(AMDGPU::BRANCH)).addMBB(FBB); - } - assert(0 && "Inserting two branches not supported"); - return 0; -} - -unsigned int AMDGPUInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { - MachineBasicBlock::iterator I = MBB.end(); - if (I == MBB.begin()) { - return 0; - } - --I; - switch (I->getOpcode()) { - default: - return 0; - ExpandCaseToAllScalarTypes(AMDGPU::BRANCH_COND); - case AMDGPU::BRANCH: - I->eraseFromParent(); - break; - } - I = MBB.end(); - - if (I == MBB.begin()) { - return 1; - } - --I; - switch (I->getOpcode()) { - // FIXME: only one case?? - default: - return 1; - ExpandCaseToAllScalarTypes(AMDGPU::BRANCH_COND); - I->eraseFromParent(); - break; - } - return 2; -} - MachineBasicBlock::iterator skipFlowControl(MachineBasicBlock *MBB) { MachineBasicBlock::iterator tmp = MBB->end(); if (!MBB->size()) { |