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-rw-r--r--src/gallium/drivers/r600/evergreen_state.c8
-rw-r--r--src/gallium/drivers/r600/r600_resource.h3
-rw-r--r--src/gallium/drivers/r600/r600_state.c6
-rw-r--r--src/gallium/drivers/r600/r600_texture.c4
4 files changed, 8 insertions, 13 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 89e2d06abdd..45469db6c95 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -390,10 +390,8 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
bo[1] = rbuffer->bo;
pitch = align(tmp->pitch_in_pixels[0], 8);
- if (tmp->tiled) {
- array_mode = tmp->array_mode[0];
- tile_type = tmp->tile_type;
- }
+ array_mode = tmp->array_mode[0];
+ tile_type = tmp->tile_type;
/* FIXME properly handle first level != 0 */
r600_pipe_state_add_reg(rstate, R_030000_RESOURCE0_WORD0,
@@ -694,7 +692,7 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
ntype != 4 && ntype != 5)
color_info |= S_028C70_SOURCE_FORMAT(V_028C70_EXPORT_4C_16BPC);
- if (rtex->tiled) {
+ if (rtex->array_mode[level] > V_028C70_ARRAY_LINEAR_ALIGNED) {
tile_type = rtex->tile_type;
} else /* workaround for linear buffers */
tile_type = 1;
diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h
index 2e7a28cc94f..a6d2141e5f2 100644
--- a/src/gallium/drivers/r600/r600_resource.h
+++ b/src/gallium/drivers/r600/r600_resource.h
@@ -59,7 +59,6 @@ struct r600_resource_texture {
unsigned array_mode[PIPE_MAX_TEXTURE_LEVELS];
unsigned pitch_override;
unsigned size;
- unsigned tiled;
unsigned tile_type;
unsigned depth;
unsigned dirty_db;
@@ -67,6 +66,8 @@ struct r600_resource_texture {
boolean is_flushing_texture;
};
+#define R600_TEX_IS_TILED(tex, level) ((tex)->array_mode[level] != V_038000_ARRAY_LINEAR_GENERAL && (tex)->array_mode[level] != V_038000_ARRAY_LINEAR_ALIGNED)
+
#define R600_BUFFER_MAGIC 0xabcd1600
/* XXX this could be removed */
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 43cba667de9..bf74511b63f 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -438,10 +438,8 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
bo[0] = rbuffer->bo;
bo[1] = rbuffer->bo;
pitch = align(tmp->pitch_in_pixels[0], 8);
- if (tmp->tiled) {
- array_mode = tmp->array_mode[0];
- tile_type = tmp->tile_type;
- }
+ array_mode = tmp->array_mode[0];
+ tile_type = tmp->tile_type;
/* FIXME properly handle first level != 0 */
r600_pipe_state_add_reg(rstate, R_038000_RESOURCE0_WORD0,
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index 793bdc4d5ec..30e31e58d31 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -388,8 +388,6 @@ r600_texture_create_object(struct pipe_screen *screen,
if (util_format_is_depth_or_stencil(base->format) && permit_hardware_blit(screen, base))
rtex->depth = 1;
- if (array_mode)
- rtex->tiled = 1;
r600_setup_miptree(screen, rtex, array_mode);
resource->size = rtex->size;
@@ -557,7 +555,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
* the CPU is much happier reading out of cached system memory
* than uncached VRAM.
*/
- if (rtex->tiled)
+ if (R600_TEX_IS_TILED(rtex, level))
use_staging_texture = TRUE;
if ((usage & PIPE_TRANSFER_READ) && u_box_volume(box) > 1024)