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-rw-r--r--src/gallium/drivers/r600/evergreen_state.c8
-rw-r--r--src/gallium/drivers/r600/r600_state.c8
-rw-r--r--src/gallium/drivers/r600/r600_texture.c15
-rw-r--r--src/gallium/drivers/r600/radeon_uvd.c2
4 files changed, 17 insertions, 16 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index dcbc6862832..a9982b59155 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -3667,7 +3667,7 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx,
z = src_z;
base = rsrc->surface.u.legacy.level[src_level].offset;
addr = rdst->surface.u.legacy.level[dst_level].offset;
- addr += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+ addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
addr += dst_y * pitch + dst_x * bpp;
bank_h = eg_bank_wh(rsrc->surface.u.legacy.bankh);
bank_w = eg_bank_wh(rsrc->surface.u.legacy.bankw);
@@ -3692,7 +3692,7 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx,
z = dst_z;
base = rdst->surface.u.legacy.level[dst_level].offset;
addr = rsrc->surface.u.legacy.level[src_level].offset;
- addr += rsrc->surface.u.legacy.level[src_level].slice_size * src_z;
+ addr += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_z;
addr += src_y * pitch + src_x * bpp;
bank_h = eg_bank_wh(rdst->surface.u.legacy.bankh);
bank_w = eg_bank_wh(rdst->surface.u.legacy.bankw);
@@ -3809,10 +3809,10 @@ static void evergreen_dma_copy(struct pipe_context *ctx,
* dst_pitch == src_pitch
*/
src_offset= rsrc->surface.u.legacy.level[src_level].offset;
- src_offset += rsrc->surface.u.legacy.level[src_level].slice_size * src_box->z;
+ src_offset += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_box->z;
src_offset += src_y * src_pitch + src_x * bpp;
dst_offset = rdst->surface.u.legacy.level[dst_level].offset;
- dst_offset += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+ dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
dst_offset += dst_y * dst_pitch + dst_x * bpp;
evergreen_dma_copy_buffer(rctx, dst, src, dst_offset, src_offset,
src_box->height * src_pitch);
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 31029055379..cbf860f45f6 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2881,7 +2881,7 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx,
z = src_z;
base = rsrc->surface.u.legacy.level[src_level].offset;
addr = rdst->surface.u.legacy.level[dst_level].offset;
- addr += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+ addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
addr += dst_y * pitch + dst_x * bpp;
} else {
/* L2T */
@@ -2900,7 +2900,7 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx,
z = dst_z;
base = rdst->surface.u.legacy.level[dst_level].offset;
addr = rsrc->surface.u.legacy.level[src_level].offset;
- addr += rsrc->surface.u.legacy.level[src_level].slice_size * src_z;
+ addr += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_z;
addr += src_y * pitch + src_x * bpp;
}
/* check that we are in dw/base alignment constraint */
@@ -3005,10 +3005,10 @@ static void r600_dma_copy(struct pipe_context *ctx,
* dst_pitch == src_pitch
*/
src_offset= rsrc->surface.u.legacy.level[src_level].offset;
- src_offset += rsrc->surface.u.legacy.level[src_level].slice_size * src_box->z;
+ src_offset += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_box->z;
src_offset += src_y * src_pitch + src_x * bpp;
dst_offset = rdst->surface.u.legacy.level[dst_level].offset;
- dst_offset += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+ dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
dst_offset += dst_y * dst_pitch + dst_x * bpp;
size = src_box->height * src_pitch;
/* must be dw aligned */
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index f7c9b63b112..07782ff8ce9 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -178,7 +178,8 @@ static unsigned r600_texture_get_offset(struct r600_common_screen *rscreen,
{
*stride = rtex->surface.u.legacy.level[level].nblk_x *
rtex->surface.bpe;
- *layer_stride = rtex->surface.u.legacy.level[level].slice_size;
+ assert((uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 <= UINT_MAX);
+ *layer_stride = (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4;
if (!box)
return rtex->surface.u.legacy.level[level].offset;
@@ -186,7 +187,7 @@ static unsigned r600_texture_get_offset(struct r600_common_screen *rscreen,
/* Each texture is an array of mipmap levels. Each level is
* an array of slices. */
return rtex->surface.u.legacy.level[level].offset +
- box->z * rtex->surface.u.legacy.level[level].slice_size +
+ box->z * (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 +
(box->y / rtex->surface.blk_h *
rtex->surface.u.legacy.level[level].nblk_x +
box->x / rtex->surface.blk_w) * rtex->surface.bpe;
@@ -256,8 +257,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
* for those
*/
surface->u.legacy.level[0].nblk_x = pitch_in_bytes_override / bpe;
- surface->u.legacy.level[0].slice_size = pitch_in_bytes_override *
- surface->u.legacy.level[0].nblk_y;
+ surface->u.legacy.level[0].slice_size_dw =
+ ((uint64_t)pitch_in_bytes_override * surface->u.legacy.level[0].nblk_y) / 4;
}
if (offset) {
@@ -502,7 +503,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
offset = rtex->surface.u.legacy.level[0].offset;
stride = rtex->surface.u.legacy.level[0].nblk_x *
rtex->surface.bpe;
- slice_size = rtex->surface.u.legacy.level[0].slice_size;
+ slice_size = (uint64_t)rtex->surface.u.legacy.level[0].slice_size_dw * 4;
} else {
/* Move a suballocated buffer into a non-suballocated allocation. */
if (rscreen->ws->buffer_is_suballocated(res->buf)) {
@@ -847,7 +848,7 @@ void r600_print_texture_info(struct r600_common_screen *rscreen,
"npix_x=%u, npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
"mode=%u, tiling_index = %u\n",
i, rtex->surface.u.legacy.level[i].offset,
- rtex->surface.u.legacy.level[i].slice_size,
+ (uint64_t)rtex->surface.u.legacy.level[i].slice_size_dw * 4,
u_minify(rtex->resource.b.b.width0, i),
u_minify(rtex->resource.b.b.height0, i),
u_minify(rtex->resource.b.b.depth0, i),
@@ -865,7 +866,7 @@ void r600_print_texture_info(struct r600_common_screen *rscreen,
"npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
"mode=%u, tiling_index = %u\n",
i, rtex->surface.u.legacy.stencil_level[i].offset,
- rtex->surface.u.legacy.stencil_level[i].slice_size,
+ (uint64_t)rtex->surface.u.legacy.stencil_level[i].slice_size_dw * 4,
u_minify(rtex->resource.b.b.width0, i),
u_minify(rtex->resource.b.b.height0, i),
u_minify(rtex->resource.b.b.depth0, i),
diff --git a/src/gallium/drivers/r600/radeon_uvd.c b/src/gallium/drivers/r600/radeon_uvd.c
index b0551d7e1e3..69bba8cf6c6 100644
--- a/src/gallium/drivers/r600/radeon_uvd.c
+++ b/src/gallium/drivers/r600/radeon_uvd.c
@@ -1414,7 +1414,7 @@ error:
static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
{
return surface->u.legacy.level[0].offset +
- layer * surface->u.legacy.level[0].slice_size;
+ layer * (uint64_t)surface->u.legacy.level[0].slice_size_dw * 4;
}
/* hw encode the aspect of macro tiles */
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 06:43:01 +0000