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-rw-r--r--src/gallium/drivers/r600/r600_texture.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index 4dac440aa7e..ea017d3a6a1 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -69,7 +69,7 @@ static int r600_init_surface(struct r600_screen *rscreen,
struct radeon_surface *surface,
const struct pipe_resource *ptex,
unsigned array_mode,
- bool is_transfer, bool is_flushed_depth)
+ bool is_flushed_depth)
{
const struct util_format_description *desc =
util_format_description(ptex->format);
@@ -87,8 +87,7 @@ static int r600_init_surface(struct r600_screen *rscreen,
surface->array_size = 1;
surface->last_level = ptex->last_level;
- if (rscreen->chip_class >= EVERGREEN &&
- !is_transfer && !is_flushed_depth &&
+ if (rscreen->chip_class >= EVERGREEN && !is_flushed_depth &&
ptex->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
surface->bpe = 4; /* stencil is allocated separately on evergreen */
} else {
@@ -148,7 +147,7 @@ static int r600_init_surface(struct r600_screen *rscreen,
surface->flags |= RADEON_SURF_SCANOUT;
}
- if (!is_transfer && !is_flushed_depth && is_depth) {
+ if (!is_flushed_depth && is_depth) {
surface->flags |= RADEON_SURF_ZBUFFER;
if (is_stencil) {
@@ -513,7 +512,6 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
array_mode = V_038000_ARRAY_LINEAR_ALIGNED;
r = r600_init_surface(rscreen, &surface, templ, array_mode,
- templ->flags & R600_RESOURCE_FLAG_TRANSFER,
templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH);
if (r) {
return NULL;
@@ -603,7 +601,7 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
else
array_mode = 0;
- r = r600_init_surface(rscreen, &surface, templ, array_mode, false, false);
+ r = r600_init_surface(rscreen, &surface, templ, array_mode, false);
if (r) {
return NULL;
}