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-rw-r--r--src/gallium/drivers/r600/evergreen_compute.c2
-rw-r--r--src/gallium/drivers/r600/r600_hw_context.c6
-rw-r--r--src/gallium/drivers/r600/r600_state_common.c2
3 files changed, 4 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c
index c9643fcf2ee..8db525e0bf6 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -452,7 +452,7 @@ static void compute_emit_cs(struct r600_context *rctx,
unsigned i;
/* make sure that the gfx ring is only one active */
- if (rctx->b.dma.cs && rctx->b.dma.cs->cdw) {
+ if (radeon_emitted(rctx->b.dma.cs, 0)) {
rctx->b.dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
}
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 6534d8bc4ab..1f7bed824b0 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -33,10 +33,8 @@
void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
boolean count_draw_in)
{
- struct radeon_winsys_cs *dma = ctx->b.dma.cs;
-
/* Flush the DMA IB if it's not empty. */
- if (dma && dma->cdw)
+ if (radeon_emitted(ctx->b.dma.cs, 0))
ctx->b.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
if (!ctx->b.ws->cs_memory_below_limit(ctx->b.gfx.cs, ctx->b.vram, ctx->b.gtt)) {
@@ -250,7 +248,7 @@ void r600_context_gfx_flush(void *context, unsigned flags,
struct r600_context *ctx = context;
struct radeon_winsys_cs *cs = ctx->b.gfx.cs;
- if (cs->cdw == ctx->b.initial_gfx_cs_size && !fence)
+ if (!radeon_emitted(cs, ctx->b.initial_gfx_cs_size) && !fence)
return;
r600_preflush_suspend_features(&ctx->b);
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 42838c28d93..b3814fb478f 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1681,7 +1681,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
}
/* make sure that the gfx ring is only one active */
- if (rctx->b.dma.cs && rctx->b.dma.cs->cdw) {
+ if (radeon_emitted(rctx->b.dma.cs, 0)) {
rctx->b.dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
}