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path: root/src/gallium/drivers/r600/r600_asm.c
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Diffstat (limited to 'src/gallium/drivers/r600/r600_asm.c')
-rw-r--r--src/gallium/drivers/r600/r600_asm.c1086
1 files changed, 173 insertions, 913 deletions
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 1a501f62cba..6b60529f060 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -34,184 +34,14 @@
#define NUM_OF_CYCLES 3
#define NUM_OF_COMPONENTS 4
-static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
+static inline unsigned int r600_bytecode_get_num_operands(
+ struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
- if(alu->is_op3)
- return 3;
-
- switch (bc->chip_class) {
- default:
- case R600:
- case R700:
- switch (alu->inst) {
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP:
- return 0;
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT:
- return 2;
-
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE:
- case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT:
- return 1;
- default: R600_ERR(
- "Need instruction operand number for 0x%x.\n", alu->inst);
- }
- break;
- case EVERGREEN:
- case CAYMAN:
- switch (alu->inst) {
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP:
- return 0;
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT:
- return 2;
-
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT:
- case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT:
- return 1;
- default:
- R600_ERR("Need instruction operand number for 0x%x.\n", alu->inst);
- }
- break;
- }
-
- return 3;
+ return r600_isa_alu(alu->op)->src_count;
}
-int r700_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id);
+int r700_bytecode_alu_build(struct r600_bytecode *bc,
+ struct r600_bytecode_alu *alu, unsigned id);
static struct r600_bytecode_cf *r600_bytecode_cf(void)
{
@@ -298,16 +128,17 @@ static int r600_bytecode_add_cf(struct r600_bytecode *bc)
return 0;
}
-int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecode_output *output)
+int r600_bytecode_add_output(struct r600_bytecode *bc,
+ const struct r600_bytecode_output *output)
{
int r;
if (output->gpr >= bc->ngpr)
bc->ngpr = output->gpr + 1;
- if (bc->cf_last && (bc->cf_last->inst == output->inst ||
- (bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT) &&
- output->inst == BC_INST(bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE))) &&
+ if (bc->cf_last && (bc->cf_last->op == output->op ||
+ (bc->cf_last->op == CF_OP_EXPORT &&
+ output->op == CF_OP_EXPORT_DONE)) &&
output->type == bc->cf_last->output.type &&
output->elem_size == bc->cf_last->output.elem_size &&
output->swizzle_x == bc->cf_last->output.swizzle_x &&
@@ -320,7 +151,7 @@ int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecod
(output->array_base + output->burst_count) == bc->cf_last->output.array_base) {
bc->cf_last->output.end_of_program |= output->end_of_program;
- bc->cf_last->output.inst = output->inst;
+ bc->cf_last->op = bc->cf_last->output.op = output->op;
bc->cf_last->output.gpr = output->gpr;
bc->cf_last->output.array_base = output->array_base;
bc->cf_last->output.burst_count += output->burst_count;
@@ -330,7 +161,7 @@ int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecod
output->array_base == (bc->cf_last->output.array_base + bc->cf_last->output.burst_count)) {
bc->cf_last->output.end_of_program |= output->end_of_program;
- bc->cf_last->output.inst = output->inst;
+ bc->cf_last->op = bc->cf_last->output.op = output->op;
bc->cf_last->output.burst_count += output->burst_count;
return 0;
}
@@ -339,7 +170,7 @@ int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecod
r = r600_bytecode_add_cf(bc);
if (r)
return r;
- bc->cf_last->inst = output->inst;
+ bc->cf_last->op = output->op;
memcpy(&bc->cf_last->output, output, sizeof(struct r600_bytecode_output));
return 0;
}
@@ -347,137 +178,18 @@ int r600_bytecode_add_output(struct r600_bytecode *bc, const struct r600_bytecod
/* alu instructions that can ony exits once per group */
static int is_alu_once_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
- switch (bc->chip_class) {
- case R600:
- case R700:
- return !alu->is_op3 && (
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT);
- case EVERGREEN:
- case CAYMAN:
- default:
- return !alu->is_op3 && (
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT);
- }
+ return r600_isa_alu(alu->op)->flags & (AF_KILL | AF_PRED);
}
static int is_alu_reduction_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
- switch (bc->chip_class) {
- case R600:
- case R700:
- return !alu->is_op3 && (
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4);
- case EVERGREEN:
- case CAYMAN:
- default:
- return !alu->is_op3 && (
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE ||
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4);
- }
-}
-
-static int is_alu_cube_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
-{
- switch (bc->chip_class) {
- case R600:
- case R700:
- return !alu->is_op3 &&
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE;
- case EVERGREEN:
- case CAYMAN:
- default:
- return !alu->is_op3 &&
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE;
- }
+ return (r600_isa_alu(alu->op)->flags & AF_REPL) &&
+ (r600_isa_alu_slots(bc->isa->hw_class, alu->op) == AF_4V);
}
static int is_alu_mova_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
- switch (bc->chip_class) {
- case R600:
- case R700:
- return !alu->is_op3 && (
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT ||
- alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT);
- case EVERGREEN:
- case CAYMAN:
- default:
- return !alu->is_op3 && (
- alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
- }
+ return r600_isa_alu(alu->op)->flags & AF_MOVA;
}
static int alu_uses_rel(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
@@ -497,130 +209,28 @@ static int alu_uses_rel(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
return 0;
}
-static int is_opcode_in_range(unsigned opcode, unsigned min, unsigned max)
-{
- return min <= opcode && opcode <= max;
-}
-
-/* ALU instructions that can only execute on the vector unit:
- *
- * opcode ranges:
- * R6xx/R7xx:
- * op3 : [0x08 - 0x0B]
- * op2 : 0x07, [0x15 - 0x18], [0x1B - 0x1D], [0x50 - 0x53], [0x7A - 0x7E]
- *
- * EVERGREEN:
- * op3: [0x04 - 0x11]
- * op2: [0xA0 - 0xE2]
- */
static int is_alu_vec_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
- switch (bc->chip_class) {
- case R600:
- case R700:
- if (alu->is_op3)
- return is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_64,
- V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_64_D2);
- else
- return (alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FREXP_64) ||
- is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT) ||
- is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_64,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT32_TO_FLT64) ||
- is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4) ||
- is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDEXP_64,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_64);
-
- case EVERGREEN:
- if (alu->is_op3)
- return is_opcode_in_range(alu->inst,
- EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_BFE_UINT,
- EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_LDS_IDX_OP);
- else
- return is_opcode_in_range(alu->inst,
- EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_BFM_INT,
- EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P20);
- case CAYMAN:
- default:
- assert(0);
- return 0;
- }
+ unsigned slots = r600_isa_alu_slots(bc->isa->hw_class, alu->op);
+ return !(slots & AF_S);
}
-/* ALU instructions that can only execute on the trans unit:
- *
- * opcode ranges:
- * R600:
- * op3: 0x0C
- * op2: [0x60 - 0x79]
- *
- * R700:
- * op3: 0x0C
- * op2: [0x60 - 0x6F], [0x73 - 0x79]
- *
- * EVERGREEN:
- * op3: 0x1F
- * op2: [0x81 - 0x9C]
- */
static int is_alu_trans_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
-
- switch (bc->chip_class) {
- case R600:
- if (alu->is_op3)
- return alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
- else
- return is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT);
- case R700:
- if (alu->is_op3)
- return alu->inst == V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
- else
- return is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS) ||
- is_opcode_in_range(alu->inst,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT,
- V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT);
- case EVERGREEN:
- if (alu->is_op3)
- return alu->inst == EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
- else
- return is_opcode_in_range(alu->inst,
- EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE,
- EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT);
- case CAYMAN:
- default:
- assert(0);
- return 0;
- }
+ unsigned slots = r600_isa_alu_slots(bc->isa->hw_class, alu->op);
+ return !(slots & AF_V);
}
/* alu instructions that can execute on any unit */
static int is_alu_any_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
- return !is_alu_vec_unit_inst(bc, alu) &&
- !is_alu_trans_unit_inst(bc, alu);
+ unsigned slots = r600_isa_alu_slots(bc->isa->hw_class, alu->op);
+ return slots == AF_VS;
}
static int is_nop_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
- switch (bc->chip_class) {
- case R600:
- case R700:
- return (!alu->is_op3 && alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
- case EVERGREEN:
- case CAYMAN:
- default:
- return (!alu->is_op3 && alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
- }
+ return alu->op == ALU_OP0_NOP;
}
static int assign_alu_units(struct r600_bytecode *bc, struct r600_bytecode_alu *alu_first,
@@ -929,7 +539,7 @@ static int replace_gpr_with_pv_ps(struct r600_bytecode *bc,
if (prev[i] && (prev[i]->dst.write || prev[i]->is_op3) && !prev[i]->dst.rel) {
gpr[i] = prev[i]->dst.sel;
/* cube writes more than PV.X */
- if (!is_alu_cube_inst(bc, prev[i]) && is_alu_reduction_inst(bc, prev[i]))
+ if (is_alu_reduction_inst(bc, prev[i]))
chan[i] = 0;
else
chan[i] = prev[i]->dst.chan;
@@ -1351,7 +961,9 @@ static int r600_bytecode_assign_kcache_banks(struct r600_bytecode *bc,
return 0;
}
-static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, int type)
+static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc,
+ struct r600_bytecode_alu *alu,
+ unsigned type)
{
struct r600_bytecode_kcache kcache_sets[4];
struct r600_bytecode_kcache *kcache = kcache_sets;
@@ -1364,7 +976,7 @@ static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, struct r60
if ((r = r600_bytecode_add_cf(bc))) {
return r;
}
- bc->cf_last->inst = type;
+ bc->cf_last->op = type;
/* retry with the new clause */
kcache = bc->cf_last->kcache;
@@ -1394,7 +1006,7 @@ static int insert_nop_r6xx(struct r600_bytecode *bc)
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP;
+ alu.op = ALU_OP0_NOP;
alu.src[0].chan = i;
alu.dst.chan = i;
alu.last = (i == 3);
@@ -1419,7 +1031,7 @@ static int load_ar_r6xx(struct r600_bytecode *bc)
bc->force_add_cf = 1;
memset(&alu, 0, sizeof(alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT;
+ alu.op = ALU_OP1_MOVA_GPR_INT;
alu.src[0].sel = bc->ar_reg;
alu.src[0].chan = bc->ar_chan;
alu.last = 1;
@@ -1450,7 +1062,7 @@ static int load_ar(struct r600_bytecode *bc)
bc->force_add_cf = 1;
memset(&alu, 0, sizeof(alu));
- alu.inst = BC_INST(bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
+ alu.op = ALU_OP1_MOVA_INT;
alu.src[0].sel = bc->ar_reg;
alu.src[0].chan = bc->ar_chan;
alu.last = 1;
@@ -1463,7 +1075,8 @@ static int load_ar(struct r600_bytecode *bc)
return 0;
}
-int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu, int type)
+int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
+ const struct r600_bytecode_alu *alu, unsigned type)
{
struct r600_bytecode_alu *nalu = r600_bytecode_alu();
struct r600_bytecode_alu *lalu;
@@ -1473,10 +1086,10 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec
return -ENOMEM;
memcpy(nalu, alu, sizeof(struct r600_bytecode_alu));
- if (bc->cf_last != NULL && bc->cf_last->inst != type) {
+ if (bc->cf_last != NULL && bc->cf_last->op != type) {
/* check if we could add it anyway */
- if (bc->cf_last->inst == BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU) &&
- type == BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE)) {
+ if (bc->cf_last->op == CF_OP_ALU &&
+ type == CF_OP_ALU_PUSH_BEFORE) {
LIST_FOR_EACH_ENTRY(lalu, &bc->cf_last->alu, list) {
if (lalu->execute_mask) {
bc->force_add_cf = 1;
@@ -1495,7 +1108,7 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec
return r;
}
}
- bc->cf_last->inst = type;
+ bc->cf_last->op = type;
/* Check AR usage and load it if required */
for (i = 0; i < 3; i++)
@@ -1586,7 +1199,7 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec
int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu)
{
- return r600_bytecode_add_alu_type(bc, alu, BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU));
+ return r600_bytecode_add_alu_type(bc, alu, CF_OP_ALU);
}
static unsigned r600_bytecode_num_tex_and_vtx_instructions(const struct r600_bytecode *bc)
@@ -1608,19 +1221,9 @@ static unsigned r600_bytecode_num_tex_and_vtx_instructions(const struct r600_byt
static inline boolean last_inst_was_not_vtx_fetch(struct r600_bytecode *bc)
{
- switch (bc->chip_class) {
- case R700:
- case R600:
- return bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX &&
- bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC;
- case EVERGREEN:
- return bc->cf_last->inst != EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX;
- case CAYMAN:
- return bc->cf_last->inst != CM_V_SQ_CF_WORD1_SQ_CF_INST_TC;
- default:
- R600_ERR("Unknown chip class %d.\n", bc->chip_class);
- return FALSE;
- }
+ return !((r600_isa_cf(bc->cf_last->op)->flags & CF_FETCH) &&
+ (bc->chip_class == CAYMAN ||
+ bc->cf_last->op != CF_OP_TEX));
}
int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx)
@@ -1644,13 +1247,11 @@ int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_v
switch (bc->chip_class) {
case R600:
case R700:
- bc->cf_last->inst = V_SQ_CF_WORD1_SQ_CF_INST_VTX;
- break;
case EVERGREEN:
- bc->cf_last->inst = EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX;
+ bc->cf_last->op = CF_OP_VTX;
break;
case CAYMAN:
- bc->cf_last->inst = CM_V_SQ_CF_WORD1_SQ_CF_INST_TC;
+ bc->cf_last->op = CF_OP_TEX;
break;
default:
R600_ERR("Unknown chip class %d.\n", bc->chip_class);
@@ -1682,7 +1283,7 @@ int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_t
/* we can't fetch data und use it as texture lookup address in the same TEX clause */
if (bc->cf_last != NULL &&
- bc->cf_last->inst == BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX)) {
+ bc->cf_last->op == CF_OP_TEX) {
struct r600_bytecode_tex *ttex;
LIST_FOR_EACH_ENTRY(ttex, &bc->cf_last->tex, list) {
if (ttex->dst_gpr == ntex->src_gpr) {
@@ -1691,20 +1292,20 @@ int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_t
}
}
/* slight hack to make gradients always go into same cf */
- if (ntex->inst == SQ_TEX_INST_SET_GRADIENTS_H)
+ if (ntex->op == FETCH_OP_SET_GRADIENTS_H)
bc->force_add_cf = 1;
}
/* cf can contains only alu or only vtx or only tex */
if (bc->cf_last == NULL ||
- bc->cf_last->inst != BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX) ||
+ bc->cf_last->op != CF_OP_TEX ||
bc->force_add_cf) {
r = r600_bytecode_add_cf(bc);
if (r) {
free(ntex);
return r;
}
- bc->cf_last->inst = BC_INST(bc, V_SQ_CF_WORD1_SQ_CF_INST_TEX);
+ bc->cf_last->op = CF_OP_TEX;
}
if (ntex->src_gpr >= bc->ngpr) {
bc->ngpr = ntex->src_gpr + 1;
@@ -1721,7 +1322,7 @@ int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_t
return 0;
}
-int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst)
+int r600_bytecode_add_cfinst(struct r600_bytecode *bc, unsigned op)
{
int r;
r = r600_bytecode_add_cf(bc);
@@ -1729,13 +1330,13 @@ int r600_bytecode_add_cfinst(struct r600_bytecode *bc, int inst)
return r;
bc->cf_last->cond = V_SQ_CF_COND_ACTIVE;
- bc->cf_last->inst = inst;
+ bc->cf_last->op = op;
return 0;
}
int cm_bytecode_add_cf_end(struct r600_bytecode *bc)
{
- return r600_bytecode_add_cfinst(bc, CM_V_SQ_CF_WORD1_SQ_CF_INST_END);
+ return r600_bytecode_add_cfinst(bc, CF_OP_CF_END);
}
/* common to all 3 families */
@@ -1770,8 +1371,9 @@ static int r600_bytecode_vtx_build(struct r600_bytecode *bc, struct r600_bytecod
/* common to all 3 families */
static int r600_bytecode_tex_build(struct r600_bytecode *bc, struct r600_bytecode_tex *tex, unsigned id)
{
- bc->bytecode[id++] = S_SQ_TEX_WORD0_TEX_INST(tex->inst) |
- EG_S_SQ_TEX_WORD0_INST_MOD(tex->inst_mod) |
+ bc->bytecode[id++] = S_SQ_TEX_WORD0_TEX_INST(
+ r600_isa_fetch_opcode(bc->isa->hw_class, tex->op)) |
+ EG_S_SQ_TEX_WORD0_INST_MOD(tex->inst_mod) |
S_SQ_TEX_WORD0_RESOURCE_ID(tex->resource_id) |
S_SQ_TEX_WORD0_SRC_GPR(tex->src_gpr) |
S_SQ_TEX_WORD0_SRC_REL(tex->src_rel);
@@ -1801,6 +1403,8 @@ static int r600_bytecode_tex_build(struct r600_bytecode *bc, struct r600_bytecod
/* r600 only, r700/eg bits in r700_asm.c */
static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id)
{
+ unsigned opcode = r600_isa_alu_opcode(bc->isa->hw_class, alu->op);
+
/* don't replace gpr by pv or ps for destination register */
bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
@@ -1823,7 +1427,7 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod
S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) |
- S_SQ_ALU_WORD1_OP3_ALU_INST(alu->inst) |
+ S_SQ_ALU_WORD1_OP3_ALU_INST(opcode) |
S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle);
} else {
bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
@@ -1834,7 +1438,7 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod
S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) |
S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) |
S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
- S_SQ_ALU_WORD1_OP2_ALU_INST(alu->inst) |
+ S_SQ_ALU_WORD1_OP2_ALU_INST(opcode) |
S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->execute_mask) |
S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->update_pred);
@@ -1845,7 +1449,7 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod
static void r600_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_bytecode_cf *cf)
{
*bytecode++ = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
- *bytecode++ = cf->inst |
+ *bytecode++ = S_SQ_CF_WORD1_CF_INST(r600_isa_cf_opcode(ISA_CC_R600, cf->op)) |
S_SQ_CF_WORD1_BARRIER(1) |
S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
}
@@ -1854,35 +1458,28 @@ static void r600_bytecode_cf_vtx_build(uint32_t *bytecode, const struct r600_byt
static int r600_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf)
{
unsigned id = cf->id;
+ const struct cf_op_info *cfop = r600_isa_cf(cf->op);
+ unsigned opcode = r600_isa_cf_opcode(bc->isa->hw_class, cf->op);
- switch (cf->inst) {
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
+ if (cfop->flags & CF_ALU) {
bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
- bc->bytecode[id++] = cf->inst |
+ bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(opcode) |
S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
S_SQ_CF_ALU_WORD1_BARRIER(1) |
S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chip_class == R600 ? cf->r6xx_uses_waterfall : 0) |
S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
- break;
- case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
+ } else if (cfop->flags & CF_FETCH) {
if (bc->chip_class == R700)
r700_bytecode_cf_vtx_build(&bc->bytecode[id], cf);
else
r600_bytecode_cf_vtx_build(&bc->bytecode[id], cf);
- break;
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
+ } else if (cfop->flags & CF_EXP) {
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
@@ -1893,44 +1490,25 @@ static int r600_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
- cf->output.inst |
+ S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program);
- break;
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3:
+ } else if (cfop->flags & CF_STRM) {
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type);
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
- cf->output.inst |
+ S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program) |
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size) |
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask);
- break;
- case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
+ } else {
bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
- bc->bytecode[id++] = cf->inst |
+ bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(opcode) |
S_SQ_CF_WORD1_BARRIER(1) |
S_SQ_CF_WORD1_COND(cf->cond) |
S_SQ_CF_WORD1_POP_COUNT(cf->pop_count);
-
- break;
- default:
- R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
- return -EINVAL;
}
return 0;
}
@@ -1956,86 +1534,9 @@ int r600_bytecode_build(struct r600_bytecode *bc)
/* addr start after all the CF instructions */
addr = bc->cf_last->id + 2;
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
- if (bc->chip_class >= EVERGREEN) {
- switch (cf->inst) {
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- /* fetch node need to be 16 bytes aligned*/
- addr += 3;
- addr &= 0xFFFFFFFCUL;
- break;
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF3:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
- case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
- case CF_NATIVE:
- break;
- default:
- R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
- return -EINVAL;
- }
- } else {
- switch (cf->inst) {
- case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
- /* fetch node need to be 16 bytes aligned*/
- addr += 3;
- addr &= 0xFFFFFFFCUL;
- break;
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3:
- case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
- break;
- default:
- R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
- return -EINVAL;
- }
+ if (r600_isa_cf(cf->op)->flags & CF_FETCH) {
+ addr += 3;
+ addr &= 0xFFFFFFFCUL;
}
cf->addr = addr;
addr += cf->ndw;
@@ -2046,185 +1547,68 @@ int r600_bytecode_build(struct r600_bytecode *bc)
if (bc->bytecode == NULL)
return -ENOMEM;
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
+ const struct cf_op_info *cfop = r600_isa_cf(cf->op);
addr = cf->addr;
- if (bc->chip_class >= EVERGREEN) {
+ if (bc->chip_class >= EVERGREEN)
r = eg_bytecode_cf_build(bc, cf);
- if (r)
- return r;
-
- switch (cf->inst) {
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
- nliteral = 0;
- memset(literal, 0, sizeof(literal));
- LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
- r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
- if (r)
- return r;
- r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
- r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
-
- switch(bc->chip_class) {
- case EVERGREEN: /* eg alu is same encoding as r700 */
- case CAYMAN:
- r = r700_bytecode_alu_build(bc, alu, addr);
- break;
- default:
- R600_ERR("unknown chip class %d.\n", bc->chip_class);
- return -EINVAL;
- }
- if (r)
- return r;
- addr += 2;
- if (alu->last) {
- for (i = 0; i < align(nliteral, 2); ++i) {
- bc->bytecode[addr++] = literal[i];
- }
- nliteral = 0;
- memset(literal, 0, sizeof(literal));
- }
- }
- break;
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
- r = r600_bytecode_vtx_build(bc, vtx, addr);
- if (r)
- return r;
- addr += 4;
- }
- break;
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
- assert(bc->chip_class >= EVERGREEN);
- r = r600_bytecode_vtx_build(bc, vtx, addr);
- if (r)
- return r;
- addr += 4;
- }
- LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
- r = r600_bytecode_tex_build(bc, tex, addr);
- if (r)
- return r;
- addr += 4;
- }
- break;
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF3:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
- case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
- break;
- case CF_NATIVE:
- break;
- default:
- R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
- return -EINVAL;
- }
- } else {
+ else
r = r600_bytecode_cf_build(bc, cf);
- if (r)
- return r;
-
- switch (cf->inst) {
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
- nliteral = 0;
- memset(literal, 0, sizeof(literal));
- LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
- r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
- if (r)
- return r;
- r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
- r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
+ if (r)
+ return r;
+ if (cfop->flags & CF_ALU) {
+ nliteral = 0;
+ memset(literal, 0, sizeof(literal));
+ LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
+ r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
+ if (r)
+ return r;
+ r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
+ r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
- switch(bc->chip_class) {
- case R600:
- r = r600_bytecode_alu_build(bc, alu, addr);
- break;
- case R700:
- r = r700_bytecode_alu_build(bc, alu, addr);
- break;
- default:
- R600_ERR("unknown chip class %d.\n", bc->chip_class);
- return -EINVAL;
- }
- if (r)
- return r;
- addr += 2;
- if (alu->last) {
- for (i = 0; i < align(nliteral, 2); ++i) {
- bc->bytecode[addr++] = literal[i];
- }
- nliteral = 0;
- memset(literal, 0, sizeof(literal));
- }
- }
- break;
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
- LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
- r = r600_bytecode_vtx_build(bc, vtx, addr);
- if (r)
- return r;
- addr += 4;
+ switch(bc->chip_class) {
+ case R600:
+ r = r600_bytecode_alu_build(bc, alu, addr);
+ break;
+ case R700:
+ case EVERGREEN: /* eg alu is same encoding as r700 */
+ case CAYMAN:
+ r = r700_bytecode_alu_build(bc, alu, addr);
+ break;
+ default:
+ R600_ERR("unknown chip class %d.\n", bc->chip_class);
+ return -EINVAL;
}
- break;
- case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
- r = r600_bytecode_tex_build(bc, tex, addr);
- if (r)
- return r;
- addr += 4;
+ if (r)
+ return r;
+ addr += 2;
+ if (alu->last) {
+ for (i = 0; i < align(nliteral, 2); ++i) {
+ bc->bytecode[addr++] = literal[i];
+ }
+ nliteral = 0;
+ memset(literal, 0, sizeof(literal));
}
- break;
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
- break;
- default:
- R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
- return -EINVAL;
+ }
+ } else if (cf->op == CF_OP_VTX) {
+ LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
+ r = r600_bytecode_vtx_build(bc, vtx, addr);
+ if (r)
+ return r;
+ addr += 4;
+ }
+ } else if (cf->op == CF_OP_TEX) {
+ LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
+ assert(bc->chip_class >= EVERGREEN);
+ r = r600_bytecode_vtx_build(bc, vtx, addr);
+ if (r)
+ return r;
+ addr += 4;
+ }
+ LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
+ r = r600_bytecode_tex_build(bc, tex, addr);
+ if (r)
+ return r;
+ addr += 4;
}
}
}
@@ -2299,13 +1683,12 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
id = cf->id;
-
- if (bc->chip_class >= EVERGREEN) {
- switch (cf->inst) {
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
- case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
+ if (cf->op == CF_NATIVE) {
+ fprintf(stderr, "%04d %08X CF NATIVE\n", id, bc->bytecode[id]);
+ fprintf(stderr, "%04d %08X CF NATIVE\n", id + 1, bc->bytecode[id + 1]);
+ } else {
+ const struct cf_op_info *cfop = r600_isa_cf(cf->op);
+ if (cfop->flags & CF_ALU) {
if (cf->eg_alu_extended) {
fprintf(stderr, "%04d %08X ALU_EXT0 ", id, bc->bytecode[id]);
fprintf(stderr, "KCACHE_BANK2:%X ", cf->kcache[2].bank);
@@ -2326,192 +1709,61 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
fprintf(stderr, "KCACHE_BANK1:%X\n", cf->kcache[1].bank);
id++;
fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_ALU_WORD1_CF_INST(cf->inst));
- fprintf(stderr, "KCACHE_MODE1:%X ", cf->kcache[1].mode);
- fprintf(stderr, "KCACHE_ADDR0:%X ", cf->kcache[0].addr);
- fprintf(stderr, "KCACHE_ADDR1:%X ", cf->kcache[1].addr);
- fprintf(stderr, "COUNT:%d\n", cf->ndw / 2);
- break;
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
- fprintf(stderr, "ADDR:%d\n", cf->addr);
- id++;
- fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_WORD1_CF_INST(cf->inst));
- fprintf(stderr, "COUNT:%d\n", cf->ndw / 4);
- break;
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
- fprintf(stderr, "GPR:%X ", cf->output.gpr);
- fprintf(stderr, "ELEM_SIZE:%X ", cf->output.elem_size);
- fprintf(stderr, "ARRAY_BASE:%X ", cf->output.array_base);
- fprintf(stderr, "TYPE:%X\n", cf->output.type);
- id++;
- fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
- fprintf(stderr, "SWIZ_X:%X ", cf->output.swizzle_x);
- fprintf(stderr, "SWIZ_Y:%X ", cf->output.swizzle_y);
- fprintf(stderr, "SWIZ_Z:%X ", cf->output.swizzle_z);
- fprintf(stderr, "SWIZ_W:%X ", cf->output.swizzle_w);
- fprintf(stderr, "BARRIER:%X ", cf->output.barrier);
- fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst));
- fprintf(stderr, "BURST_COUNT:%d ", cf->output.burst_count);
- fprintf(stderr, "EOP:%X\n", cf->output.end_of_program);
- break;
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF3:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF0:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF1:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF2:
- case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF3:
- fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i_BUF%i ", id, bc->bytecode[id],
- (EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->inst) -
- EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0)) / 4,
- (EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->inst) -
- EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0)) % 4);
- fprintf(stderr, "GPR:%X ", cf->output.gpr);
- fprintf(stderr, "ELEM_SIZE:%i ", cf->output.elem_size);
- fprintf(stderr, "ARRAY_BASE:%i ", cf->output.array_base);
- fprintf(stderr, "TYPE:%X\n", cf->output.type);
- id++;
- fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i_BUF%i ", id, bc->bytecode[id],
- (EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->inst) -
- EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0)) / 4,
- (EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->inst) -
- EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0)) % 4);
- fprintf(stderr, "ARRAY_SIZE:%i ", cf->output.array_size);
- fprintf(stderr, "COMP_MASK:%X ", cf->output.comp_mask);
- fprintf(stderr, "BARRIER:%X ", cf->output.barrier);
- fprintf(stderr, "INST:%d ", cf->output.inst);
- fprintf(stderr, "BURST_COUNT:%d ", cf->output.burst_count);
- fprintf(stderr, "EOP:%X\n", cf->output.end_of_program);
- break;
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
- case CM_V_SQ_CF_WORD1_SQ_CF_INST_END:
- fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
- fprintf(stderr, "ADDR:%d\n", cf->cf_addr);
- id++;
- fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:0x%x ", EG_G_SQ_CF_WORD1_CF_INST(cf->inst));
- fprintf(stderr, "COND:%X ", cf->cond);
- fprintf(stderr, "POP_COUNT:%X\n", cf->pop_count);
- break;
- case CF_NATIVE:
- fprintf(stderr, "%04d %08X CF NATIVE\n", id, bc->bytecode[id]);
- fprintf(stderr, "%04d %08X CF NATIVE\n", id + 1, bc->bytecode[id + 1]);
- break;
- default:
- R600_ERR("Unknown instruction %0x\n", cf->inst);
- }
- } else {
- switch (cf->inst) {
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
- case V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
- fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
- fprintf(stderr, "ADDR:%d ", cf->addr);
- fprintf(stderr, "KCACHE_MODE0:%X ", cf->kcache[0].mode);
- fprintf(stderr, "KCACHE_BANK0:%X ", cf->kcache[0].bank);
- fprintf(stderr, "KCACHE_BANK1:%X\n", cf->kcache[1].bank);
- id++;
- fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_ALU_WORD1_CF_INST(cf->inst));
+ fprintf(stderr, "INST: %s ", cfop->name);
fprintf(stderr, "KCACHE_MODE1:%X ", cf->kcache[1].mode);
fprintf(stderr, "KCACHE_ADDR0:%X ", cf->kcache[0].addr);
fprintf(stderr, "KCACHE_ADDR1:%X ", cf->kcache[1].addr);
fprintf(stderr, "COUNT:%d\n", cf->ndw / 2);
- break;
- case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
- case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
+ } else if (cfop->flags & CF_FETCH) {
fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
fprintf(stderr, "ADDR:%d\n", cf->addr);
id++;
fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_WORD1_CF_INST(cf->inst));
+ fprintf(stderr, "INST: %s ", cfop->name);
fprintf(stderr, "COUNT:%d\n", cf->ndw / 4);
- break;
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
- fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
+ } else if (cfop->flags & CF_EXP) {
+ fprintf(stderr, "%04d %08X %s ", id, bc->bytecode[id],
+ cfop->name);
fprintf(stderr, "GPR:%X ", cf->output.gpr);
fprintf(stderr, "ELEM_SIZE:%X ", cf->output.elem_size);
fprintf(stderr, "ARRAY_BASE:%X ", cf->output.array_base);
fprintf(stderr, "TYPE:%X\n", cf->output.type);
id++;
- fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
+ fprintf(stderr, "%04d %08X %s ", id, bc->bytecode[id],
+ cfop->name);
fprintf(stderr, "SWIZ_X:%X ", cf->output.swizzle_x);
fprintf(stderr, "SWIZ_Y:%X ", cf->output.swizzle_y);
fprintf(stderr, "SWIZ_Z:%X ", cf->output.swizzle_z);
fprintf(stderr, "SWIZ_W:%X ", cf->output.swizzle_w);
fprintf(stderr, "BARRIER:%X ", cf->output.barrier);
- fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst));
+ fprintf(stderr, "INST: %s ", r600_isa_cf(cf->op)->name);
fprintf(stderr, "BURST_COUNT:%d ", cf->output.burst_count);
fprintf(stderr, "EOP:%X\n", cf->output.end_of_program);
- break;
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2:
- case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3:
- fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i ", id, bc->bytecode[id],
- R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->inst) -
- R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0));
+ } else if (cfop->flags & CF_STRM) {
+ fprintf(stderr, "%04d %08X EXPORT %s ", id, bc->bytecode[id],
+ cfop->name);
fprintf(stderr, "GPR:%X ", cf->output.gpr);
fprintf(stderr, "ELEM_SIZE:%i ", cf->output.elem_size);
fprintf(stderr, "ARRAY_BASE:%i ", cf->output.array_base);
fprintf(stderr, "TYPE:%X\n", cf->output.type);
id++;
- fprintf(stderr, "%04d %08X EXPORT MEM_STREAM%i ", id, bc->bytecode[id],
- R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->inst) -
- R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0));
+ fprintf(stderr, "%04d %08X EXPORT %s ", id, bc->bytecode[id],
+ cfop->name);
fprintf(stderr, "ARRAY_SIZE:%i ", cf->output.array_size);
fprintf(stderr, "COMP_MASK:%X ", cf->output.comp_mask);
fprintf(stderr, "BARRIER:%X ", cf->output.barrier);
- fprintf(stderr, "INST:%d ", cf->output.inst);
+ fprintf(stderr, "INST: %s ", cfop->name);
fprintf(stderr, "BURST_COUNT:%d ", cf->output.burst_count);
fprintf(stderr, "EOP:%X\n", cf->output.end_of_program);
- break;
- case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
- case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
- case V_SQ_CF_WORD1_SQ_CF_INST_POP:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
- case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
- case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
- case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
+
+ } else {
fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
fprintf(stderr, "ADDR:%d\n", cf->cf_addr);
id++;
fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:0x%x ", R600_G_SQ_CF_WORD1_CF_INST(cf->inst));
+ fprintf(stderr, "INST: %s ", cfop->name);
fprintf(stderr, "COND:%X ", cf->cond);
fprintf(stderr, "POP_COUNT:%X\n", cf->pop_count);
- break;
- default:
- R600_ERR("Unknown instruction %0x\n", cf->inst);
}
}
@@ -2521,7 +1773,7 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
- fprintf(stderr, "SRC0(SEL:%d ", alu->src[0].sel);
+ fprintf(stderr, " SRC0(SEL:%d ", alu->src[0].sel);
fprintf(stderr, "REL:%d ", alu->src[0].rel);
fprintf(stderr, "CHAN:%d ", alu->src[0].chan);
fprintf(stderr, "NEG:%d) ", alu->src[0].neg);
@@ -2534,7 +1786,7 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
fprintf(stderr, "LAST:%d)\n", alu->last);
id++;
fprintf(stderr, "%04d %08X %c ", id, bc->bytecode[id], alu->last ? '*' : ' ');
- fprintf(stderr, "INST:0x%x ", alu->inst);
+ fprintf(stderr, "INST: %s ", r600_isa_alu(alu->op)->name);
fprintf(stderr, "DST(SEL:%d ", alu->dst.sel);
fprintf(stderr, "CHAN:%d ", alu->dst.chan);
fprintf(stderr, "REL:%d ", alu->dst.rel);
@@ -2568,7 +1820,7 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:0x%x ", tex->inst);
+ fprintf(stderr, "INST: %s ", r600_isa_fetch(tex->op)->name);
fprintf(stderr, "RESOURCE_ID:%d ", tex->resource_id);
fprintf(stderr, "SRC(GPR:%d ", tex->src_gpr);
fprintf(stderr, "REL:%d)\n", tex->src_rel);
@@ -2602,7 +1854,7 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
- fprintf(stderr, "INST:%d ", vtx->inst);
+ fprintf(stderr, "INST: %s ", r600_isa_fetch(vtx->op)->name);
fprintf(stderr, "FETCH_TYPE:%d ", vtx->fetch_type);
fprintf(stderr, "BUFFER_ID:%d\n", vtx->buffer_id);
id++;
@@ -2805,13 +2057,15 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
r600_bytecode_init(&bc, rctx->chip_class, rctx->family,
rctx->screen->msaa_texture_support);
+ bc.isa = rctx->isa;
+
for (i = 0; i < count; i++) {
if (elements[i].instance_divisor > 1) {
if (rctx->chip_class == CAYMAN) {
for (j = 0; j < 4; j++) {
struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
- alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+ alu.op = ALU_OP2_MULHI_UINT;
alu.src[0].sel = 0;
alu.src[0].chan = 3;
alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
@@ -2828,7 +2082,7 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
} else {
struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
- alu.inst = BC_INST(&bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT);
+ alu.op = ALU_OP2_MULHI_UINT;
alu.src[0].sel = 0;
alu.src[0].chan = 3;
alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
@@ -2886,7 +2140,7 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
}
}
- r600_bytecode_add_cfinst(&bc, BC_INST(&bc, V_SQ_CF_WORD1_SQ_CF_INST_RETURN));
+ r600_bytecode_add_cfinst(&bc, CF_OP_RET);
if ((r = r600_bytecode_build(&bc))) {
r600_bytecode_clear(&bc);
@@ -2935,7 +2189,8 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
return shader;
}
-void r600_bytecode_alu_read(struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1)
+void r600_bytecode_alu_read(struct r600_bytecode *bc,
+ struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1)
{
/* WORD0 */
alu->src[0].sel = G_SQ_ALU_WORD0_SRC0_SEL(word0);
@@ -2965,13 +2220,16 @@ void r600_bytecode_alu_read(struct r600_bytecode_alu *alu, uint32_t word0, uint3
alu->src[2].rel = G_SQ_ALU_WORD1_OP3_SRC2_REL(word1);
alu->src[2].chan = G_SQ_ALU_WORD1_OP3_SRC2_CHAN(word1);
alu->src[2].neg = G_SQ_ALU_WORD1_OP3_SRC2_NEG(word1);
- alu->inst = G_SQ_ALU_WORD1_OP3_ALU_INST(word1);
+ alu->op = r600_isa_alu_by_opcode(bc->isa,
+ G_SQ_ALU_WORD1_OP3_ALU_INST(word1), /* is_op3 = */ 1);
+
}
else /*ALU_DWORD1_OP2*/
{
alu->src[0].abs = G_SQ_ALU_WORD1_OP2_SRC0_ABS(word1);
alu->src[1].abs = G_SQ_ALU_WORD1_OP2_SRC1_ABS(word1);
- alu->inst = G_SQ_ALU_WORD1_OP2_ALU_INST(word1);
+ alu->op = r600_isa_alu_by_opcode(bc->isa,
+ G_SQ_ALU_WORD1_OP2_ALU_INST(word1), /* is_op3 = */ 0);
alu->omod = G_SQ_ALU_WORD1_OP2_OMOD(word1);
alu->dst.write = G_SQ_ALU_WORD1_OP2_WRITE_MASK(word1);
alu->update_pred = G_SQ_ALU_WORD1_OP2_UPDATE_PRED(word1);
@@ -2980,7 +2238,8 @@ void r600_bytecode_alu_read(struct r600_bytecode_alu *alu, uint32_t word0, uint3
}
}
-void r600_bytecode_export_read(struct r600_bytecode_output *output, uint32_t word0, uint32_t word1)
+void r600_bytecode_export_read(struct r600_bytecode *bc,
+ struct r600_bytecode_output *output, uint32_t word0, uint32_t word1)
{
output->array_base = G_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(word0);
output->type = G_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(word0);
@@ -2993,7 +2252,8 @@ void r600_bytecode_export_read(struct r600_bytecode_output *output, uint32_t wor
output->swizzle_w = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(word1);
output->burst_count = G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(word1);
output->end_of_program = G_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(word1);
- output->inst = R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(word1));
+ output->op = r600_isa_cf_by_opcode(bc->isa,
+ G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(word1), 0);
output->barrier = G_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(word1);
output->array_size = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(word1);
output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-17 02:24:46 +0000