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Diffstat (limited to 'src/gallium/drivers/r600/evergreen_compute_internal.c')
-rw-r--r--src/gallium/drivers/r600/evergreen_compute_internal.c81
1 files changed, 0 insertions, 81 deletions
diff --git a/src/gallium/drivers/r600/evergreen_compute_internal.c b/src/gallium/drivers/r600/evergreen_compute_internal.c
index c5aad932c94..1d11bab8274 100644
--- a/src/gallium/drivers/r600/evergreen_compute_internal.c
+++ b/src/gallium/drivers/r600/evergreen_compute_internal.c
@@ -489,87 +489,6 @@ static unsigned r600_tex_dim(unsigned dim)
}
}
-void evergreen_set_vtx_resource(
- struct r600_pipe_compute *pipe,
- struct r600_resource* bo,
- int id, uint64_t offset, int writable)
-{
- assert(id < 16);
- uint32_t sq_vtx_constant_word2, sq_vtx_constant_word3, sq_vtx_constant_word4;
- struct number_type_and_format fmt;
- uint64_t va;
-
- fmt.format = 0;
-
- assert(bo->b.b.height0 <= 1);
- assert(bo->b.b.depth0 <= 1);
-
- int e = evergreen_compute_get_gpu_format(&fmt, bo);
-
- assert(e && "unknown format");
-
- struct evergreen_compute_resource* res =
- get_empty_res(pipe, COMPUTE_RESOURCE_VERT, id);
-
- unsigned size = bo->b.b.width0;
- unsigned stride = 1;
-
-// size = (size * util_format_get_blockwidth(bo->b.b.b.format) *
-// util_format_get_blocksize(bo->b.b.b.format));
-
- va = r600_resource_va(&pipe->ctx->screen->screen, &bo->b.b) + offset;
-
- COMPUTE_DBG("id: %i vtx size: %i byte, width0: %i elem\n",
- id, size, bo->b.b.width0);
-
- sq_vtx_constant_word2 =
- S_030008_BASE_ADDRESS_HI(va >> 32) |
- S_030008_STRIDE(stride) |
- S_030008_DATA_FORMAT(fmt.format) |
- S_030008_NUM_FORMAT_ALL(fmt.num_format_all) |
- S_030008_ENDIAN_SWAP(0);
-
- COMPUTE_DBG("%08X %i %i %i %i\n", sq_vtx_constant_word2, offset,
- stride, fmt.format, fmt.num_format_all);
-
- sq_vtx_constant_word3 =
- S_03000C_DST_SEL_X(0) |
- S_03000C_DST_SEL_Y(1) |
- S_03000C_DST_SEL_Z(2) |
- S_03000C_DST_SEL_W(3);
-
- sq_vtx_constant_word4 = 0;
-
- evergreen_emit_raw_value(res, PKT3C(PKT3_SET_RESOURCE, 8, 0));
- evergreen_emit_raw_value(res, (id+816)*32 >> 2);
- evergreen_emit_raw_value(res, (unsigned)((va) & 0xffffffff));
- evergreen_emit_raw_value(res, size - 1);
- evergreen_emit_raw_value(res, sq_vtx_constant_word2);
- evergreen_emit_raw_value(res, sq_vtx_constant_word3);
- evergreen_emit_raw_value(res, sq_vtx_constant_word4);
- evergreen_emit_raw_value(res, 0);
- evergreen_emit_raw_value(res, 0);
- evergreen_emit_raw_value(res, S_03001C_TYPE(V_03001C_SQ_TEX_VTX_VALID_BUFFER));
-
- res->bo = bo;
-
- if (writable) {
- res->usage = RADEON_USAGE_READWRITE;
- }
- else {
- res->usage = RADEON_USAGE_READ;
- }
-
- res->coher_bo_size = size;
-
- r600_inval_vertex_cache(pipe->ctx);
- /* XXX: Do we really need to invalidate the texture cache here?
- * r600_inval_vertex_cache() will invalidate the texture cache
- * if the chip does not have a vertex cache.
- */
- r600_inval_texture_cache(pipe->ctx);
-}
-
void evergreen_set_tex_resource(
struct r600_pipe_compute *pipe,
struct r600_pipe_sampler_view* view,