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path: root/src/gallium/drivers/r300/r300_surface.c
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Diffstat (limited to 'src/gallium/drivers/r300/r300_surface.c')
-rw-r--r--src/gallium/drivers/r300/r300_surface.c41
1 files changed, 25 insertions, 16 deletions
diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c
index 0503d8faed8..cc6b4f3d798 100644
--- a/src/gallium/drivers/r300/r300_surface.c
+++ b/src/gallium/drivers/r300/r300_surface.c
@@ -90,6 +90,7 @@ OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 |
/* XXX should this be related to the actual point size? */
OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 |
(0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT));
+/* XXX this big chunk should be refactored into rs_state */
OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006);
OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB);
OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000);
@@ -175,15 +176,20 @@ OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) |
/* XXX RS block and fp setup */
if (caps->is_r500) {
- OUT_CS_REG_SEQ(R500_RS_IP_0, 16);
- for (i = 0; i < 16; i++) {
+ OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
+ for (i = 0; i < 8; i++) {
/* I like the operator macros more than the shift macros... */
OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) |
(R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
(R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
(R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT));
}
- R300_PACIFY;
+ /* XXX */
+ OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
+ OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
+ OUT_CS(0x0);
+ OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE);
+
OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
OUT_CS_REG(R500_US_PIXSIZE, 0x00000000);
OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
@@ -220,21 +226,24 @@ if (caps->is_r500) {
for (i = 0; i < 8; i++) {
OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3));
}
- OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
- OUT_CS_REG(R300_RS_INST_COUNT, 0x0);
+ /* XXX */
+ OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
+ OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
+ OUT_CS(0x0);
+ OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE);
- OUT_CS_REG(R300_RS_INST_0, 0x00004000);
- OUT_CS_REG(R300_US_CONFIG, 0x00000000);
- OUT_CS_REG(R300_US_PIXSIZE, 0x00000000);
- OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000);
- OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000);
- OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000);
- OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000);
- OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000);
- OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80);
+ /* XXX magic numbers */
+ OUT_CS_REG(R300_US_CONFIG, 0x0);
+ OUT_CS_REG(R300_US_PIXSIZE, 0x0);
+ OUT_CS_REG(R300_US_CODE_OFFSET, 0x0);
+ OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
+ OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
+ OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
+ OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000);
+ OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80);
OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000);
- OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889);
- OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000);
+ OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889);
+ OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000);
}
/* XXX these magic numbers should be explained when
* this becomes a cached state object */