diff options
Diffstat (limited to 'src/gallium/drivers/nvc0')
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_3d.xml.h | 18 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_context.c | 10 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_context.h | 11 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_formats.c | 70 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_graph_macros.h | 13 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_pc.c | 23 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_pc.h | 15 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_pc_emit.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_pc_optimize.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_pc_regalloc.c | 18 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_program.c | 19 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_screen.c | 53 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_shader_state.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_state.c | 51 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_state_validate.c | 19 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_stateobj.h | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_surface.c | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/nvc0/nvc0_tgsi_to_nc.c | 15 |
18 files changed, 208 insertions, 155 deletions
diff --git a/src/gallium/drivers/nvc0/nvc0_3d.xml.h b/src/gallium/drivers/nvc0/nvc0_3d.xml.h index 94fa081ad7e..2ca0bc23836 100644 --- a/src/gallium/drivers/nvc0/nvc0_3d.xml.h +++ b/src/gallium/drivers/nvc0/nvc0_3d.xml.h @@ -82,6 +82,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_SERIALIZE 0x00000110 +#define NVC0_3D_LINE_WIDTH_SEPARATE 0x0000020c + #define NVC0_3D_EARLY_FRAGMENT_TESTS 0x00000210 #define NVC0_3D_MEM_BARRIER 0x0000021c @@ -342,10 +344,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_VERTEX_RUNOUT_ADDRESS_LOW 0x00000f88 +#define NVC0_3D_COLOR_MASK_COMMON 0x00000f90 + #define NVC0_3D_DEPTH_BOUNDS(i0) (0x00000f9c + 0x4*(i0)) #define NVC0_3D_DEPTH_BOUNDS__ESIZE 0x00000004 #define NVC0_3D_DEPTH_BOUNDS__LEN 0x00000002 +#define NVC0_3D_RT_SEPARATE_FRAG_DATA 0x00000fac + #define NVC0_3D_MSAA_MASK(i0) (0x00000fbc + 0x4*(i0)) #define NVC0_3D_MSAA_MASK__ESIZE 0x00000004 #define NVC0_3D_MSAA_MASK__LEN 0x00000004 @@ -561,6 +567,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_TEX_CACHE_CTL_UNK1__MASK 0x00000030 #define NVC0_3D_TEX_CACHE_CTL_UNK1__SHIFT 4 +#define NVC0_3D_BLEND_SEPARATE_ALPHA 0x0000133c + #define NVC0_3D_BLEND_EQUATION_RGB 0x00001340 #define NVC0_3D_BLEND_EQUATION_RGB_FUNC_ADD 0x00008006 #define NVC0_3D_BLEND_EQUATION_RGB_MIN 0x00008007 @@ -583,6 +591,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_BLEND_FUNC_DST_ALPHA 0x00001358 +#define NVC0_3D_BLEND_ENABLE_COMMON 0x0000135c + #define NVC0_3D_BLEND_ENABLE(i0) (0x00001360 + 0x4*(i0)) #define NVC0_3D_BLEND_ENABLE__ESIZE 0x00000004 #define NVC0_3D_BLEND_ENABLE__LEN 0x00000008 @@ -651,7 +661,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_SCREEN_Y_CONTROL_Y_NEGATE 0x00000001 #define NVC0_3D_SCREEN_Y_CONTROL_TRIANGLE_RAST_FLIP 0x00000010 -#define NVC0_3D_LINE_WIDTH 0x000013b0 +#define NVC0_3D_LINE_WIDTH_SMOOTH 0x000013b0 + +#define NVC0_3D_LINE_WIDTH_ALIASED 0x000013b4 #define NVC0_3D_GP_VERTEX_OUTPUT_COUNT 0x00001420 #define NVC0_3D_GP_VERTEX_OUTPUT_COUNT__MIN 0x00000001 @@ -977,6 +989,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_CULL_FACE_BACK 0x00000405 #define NVC0_3D_CULL_FACE_FRONT_AND_BACK 0x00000408 +#define NVC0_3D_LINE_LAST_PIXEL 0x00001924 + #define NVC0_3D_VIEWPORT_TRANSFORM_EN 0x0000192c #define NVC0_3D_VIEW_VOLUME_CLIP_CTRL 0x0000193c @@ -1220,8 +1234,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_TFB_VARYING_LOCS__ESIZE 0x00000004 #define NVC0_3D_TFB_VARYING_LOCS__LEN 0x00000020 -#define NVC0_3D_COLOR_MASK_BROADCAST 0x00003808 - #define NVC0_3D_VERTEX_ARRAY_SELECT 0x00003820 #define NVC0_3D_BLEND_ENABLES 0x00003858 diff --git a/src/gallium/drivers/nvc0/nvc0_context.c b/src/gallium/drivers/nvc0/nvc0_context.c index 5d2168e600b..2f2a3da7c44 100644 --- a/src/gallium/drivers/nvc0/nvc0_context.c +++ b/src/gallium/drivers/nvc0/nvc0_context.c @@ -47,6 +47,15 @@ nvc0_flush(struct pipe_context *pipe, } static void +nvc0_texture_barrier(struct pipe_context *pipe) +{ + struct nouveau_channel *chan = nvc0_context(pipe)->screen->base.channel; + + IMMED_RING(chan, RING_3D(SERIALIZE), 0); + IMMED_RING(chan, RING_3D(TEX_CACHE_CTL), 0); +} + +static void nvc0_context_unreference_resources(struct nvc0_context *nvc0) { unsigned s, i; @@ -128,6 +137,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv) pipe->clear = nvc0_clear; pipe->flush = nvc0_flush; + pipe->texture_barrier = nvc0_texture_barrier; if (!screen->cur_ctx) screen->cur_ctx = nvc0; diff --git a/src/gallium/drivers/nvc0/nvc0_context.h b/src/gallium/drivers/nvc0/nvc0_context.h index 102997e4fcb..f97141dd46e 100644 --- a/src/gallium/drivers/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nvc0/nvc0_context.h @@ -1,7 +1,6 @@ #ifndef __NVC0_CONTEXT_H__ #define __NVC0_CONTEXT_H__ -#include <stdio.h> #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" @@ -13,6 +12,7 @@ #include "draw/draw_vertex.h" +#include "nv50/nv50_debug.h" #include "nvc0_winsys.h" #include "nvc0_stateobj.h" #include "nvc0_screen.h" @@ -26,15 +26,6 @@ #include "nvc0_2d.xml.h" #include "nvc0_m2mf.xml.h" -#define NOUVEAU_ERR(fmt, args...) \ - fprintf(stderr, "%s:%d - "fmt, __FUNCTION__, __LINE__, ##args); - -#ifdef NOUVEAU_DEBUG -# define NOUVEAU_DBG(args...) printf(args); -#else -# define NOUVEAU_DBG(args...) -#endif - #define NVC0_NEW_BLEND (1 << 0) #define NVC0_NEW_RASTERIZER (1 << 1) #define NVC0_NEW_ZSA (1 << 2) diff --git a/src/gallium/drivers/nvc0/nvc0_formats.c b/src/gallium/drivers/nvc0/nvc0_formats.c index 454c7440631..678e9b563ee 100644 --- a/src/gallium/drivers/nvc0/nvc0_formats.c +++ b/src/gallium/drivers/nvc0/nvc0_formats.c @@ -145,24 +145,64 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] = [PIPE_FORMAT_L8_SRGB] = { NV50_SURFACE_FORMAT_R8_UNORM, A_(C0, C0, C0, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 8, 0), - SAMPLER_VIEW }, + SAMPLER_VIEW | RENDER_TARGET }, - [PIPE_FORMAT_I8_UNORM] = { NV50_SURFACE_FORMAT_R8_UNORM, - A_(C0, C0, C0, C0, UNORM, UNORM, UNORM, UNORM, 8, 0), + [PIPE_FORMAT_L16_SNORM] = { NV50_SURFACE_FORMAT_R16_SNORM, + B_(C0, C0, C0, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 16, 0), SAMPLER_VIEW | RENDER_TARGET }, - [PIPE_FORMAT_I16_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM, - A_(C0, C0, C0, C0, UNORM, UNORM, UNORM, UNORM, 16, 0), + [PIPE_FORMAT_L16_FLOAT] = { NV50_SURFACE_FORMAT_R16_FLOAT, + B_(C0, C0, C0, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 16, 0), SAMPLER_VIEW | RENDER_TARGET }, + [PIPE_FORMAT_L32_FLOAT] = { NV50_SURFACE_FORMAT_R32_FLOAT, + B_(C0, C0, C0, ONE_FLOAT, FLOAT, FLOAT, FLOAT, FLOAT, 32, 0), + SAMPLER_VIEW | RENDER_TARGET }, + + [PIPE_FORMAT_I8_UNORM] = { 0, + A_(C0, C0, C0, C0, UNORM, UNORM, UNORM, UNORM, 8, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_I16_UNORM] = { 0, + A_(C0, C0, C0, C0, UNORM, UNORM, UNORM, UNORM, 16, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_I16_SNORM] = { 0, + B_(C0, C0, C0, C0, SNORM, SNORM, SNORM, SNORM, 16, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_I16_FLOAT] = { 0, + B_(C0, C0, C0, C0, FLOAT, FLOAT, FLOAT, FLOAT, 16, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_I32_FLOAT] = { 0, + B_(C0, C0, C0, C0, FLOAT, FLOAT, FLOAT, FLOAT, 32, 0), + SAMPLER_VIEW }, + [PIPE_FORMAT_A8_UNORM] = { NV50_SURFACE_FORMAT_A8_UNORM, A_(ZERO, ZERO, ZERO, C0, UNORM, UNORM, UNORM, UNORM, 8, 0), SAMPLER_VIEW | RENDER_TARGET }, + [PIPE_FORMAT_A8_SNORM] = { 0, + A_(ZERO, ZERO, ZERO, C0, SNORM, SNORM, SNORM, SNORM, 8, 0), + SAMPLER_VIEW }, + [PIPE_FORMAT_A16_UNORM] = { 0, A_(ZERO, ZERO, ZERO, C0, UNORM, UNORM, UNORM, UNORM, 16, 0), SAMPLER_VIEW }, + [PIPE_FORMAT_A16_SNORM] = { 0, + A_(ZERO, ZERO, ZERO, C0, SNORM, SNORM, SNORM, SNORM, 16, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_A16_FLOAT] = { 0, + B_(ZERO, ZERO, ZERO, C0, FLOAT, FLOAT, FLOAT, FLOAT, 16, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_A32_FLOAT] = { 0, + B_(ZERO, ZERO, ZERO, C0, FLOAT, FLOAT, FLOAT, FLOAT, 32, 0), + SAMPLER_VIEW }, + [PIPE_FORMAT_L8A8_UNORM] = { 0, A_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 8_8, 0), SAMPLER_VIEW }, @@ -175,6 +215,18 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] = A_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 16_16, 0), SAMPLER_VIEW }, + [PIPE_FORMAT_L16A16_SNORM] = { 0, + A_(C0, C0, C0, C1, SNORM, SNORM, SNORM, SNORM, 16_16, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_L16A16_FLOAT] = { 0, + B_(C0, C0, C0, C1, FLOAT, FLOAT, FLOAT, FLOAT, 16_16, 0), + SAMPLER_VIEW }, + + [PIPE_FORMAT_L32A32_FLOAT] = { 0, + B_(C0, C0, C0, C1, FLOAT, FLOAT, FLOAT, FLOAT, 32_32, 0), + SAMPLER_VIEW }, + [PIPE_FORMAT_L4A4_UNORM] = { 0, B_(C0, C0, C0, C1, UNORM, UNORM, UNORM, UNORM, 4_4, 0), SAMPLER_VIEW }, @@ -322,7 +374,7 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] = VERTEX_BUFFER | SAMPLER_VIEW }, [PIPE_FORMAT_R16G16_SNORM] = { NV50_SURFACE_FORMAT_R16G16_SNORM, - A_(C0, C1, C2, C3, SNORM, SNORM, SNORM, SNORM, 16_16, 0), + A_(C0, C1, ZERO, ONE_FLOAT, SNORM, SNORM, SNORM, SNORM, 16_16, 0), VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET }, [PIPE_FORMAT_R16_SNORM] = { NV50_SURFACE_FORMAT_R16_SNORM, @@ -340,7 +392,7 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] = VERTEX_BUFFER | SAMPLER_VIEW }, [PIPE_FORMAT_R16G16_UNORM] = { NV50_SURFACE_FORMAT_R16G16_UNORM, - A_(C0, C1, C2, C3, UNORM, UNORM, UNORM, UNORM, 16_16, 0), + A_(C0, C1, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, 16_16, 0), VERTEX_BUFFER | SAMPLER_VIEW | RENDER_TARGET }, [PIPE_FORMAT_R16_UNORM] = { NV50_SURFACE_FORMAT_R16_UNORM, @@ -520,4 +572,8 @@ const struct nvc0_format nvc0_format_table[PIPE_FORMAT_COUNT] = [PIPE_FORMAT_R1_UNORM] = { 0, B_(C0, ZERO, ZERO, ONE_FLOAT, UNORM, UNORM, UNORM, UNORM, BITMAP_8X8, 0), SAMPLER_VIEW }, + + [PIPE_FORMAT_A8B8G8R8_UNORM] = { 0, + B_(C3, C2, C1, C0, UNORM, UNORM, UNORM, UNORM, 8_8_8_8, 0), + SAMPLER_VIEW }, }; diff --git a/src/gallium/drivers/nvc0/nvc0_graph_macros.h b/src/gallium/drivers/nvc0/nvc0_graph_macros.h index b7d0d3eafa4..a0a875fe627 100644 --- a/src/gallium/drivers/nvc0/nvc0_graph_macros.h +++ b/src/gallium/drivers/nvc0/nvc0_graph_macros.h @@ -68,19 +68,6 @@ static const uint32_t nvc0_9097_vertex_array_select[] = 0x00001841, /* 0x0b: send $r3 */ }; -static const uint32_t nvc0_9097_color_mask_brdc[] = -{ - 0x05a00021, /* maddr [NVC0_3D_COLOR_MASK(0), increment = 4] */ - 0x00000841, /* send $r1 */ - 0x00000841, /* send $r1 */ - 0x00000841, /* send $r1 */ - 0x00000841, /* send $r1 */ - 0x00000841, /* send $r1 */ - 0x00000841, /* send $r1 */ - 0x000008c1, /* exit send $r1 */ - 0x00000841, /* send $r1 */ -}; - /* * [GL_POLYGON_MODE_FRONT] = arg; * diff --git a/src/gallium/drivers/nvc0/nvc0_pc.c b/src/gallium/drivers/nvc0/nvc0_pc.c index bd85a7f1ffd..2c3b8555f32 100644 --- a/src/gallium/drivers/nvc0/nvc0_pc.c +++ b/src/gallium/drivers/nvc0/nvc0_pc.c @@ -20,8 +20,6 @@ * SOFTWARE. */ -#define NOUVEAU_DEBUG 1 - #include "nvc0_pc.h" #include "nvc0_program.h" @@ -262,7 +260,7 @@ nvc0_print_program(struct nv_pc *pc) nvc0_print_function(pc->root[i]); } -#if NOUVEAU_DEBUG > 1 +#if NV50_DEBUG & NV50_DEBUG_PROG_CFLOW static void nv_do_print_cfgraph(struct nv_pc *pc, FILE *f, struct nv_basic_block *b) { @@ -327,7 +325,7 @@ nvc0_pc_print_binary(struct nv_pc *pc) { unsigned i; - NOUVEAU_DBG("nvc0_pc_print_binary(%u ops)\n", pc->emit_size / 8); + NV50_DBGMSG(SHADER, "nvc0_pc_print_binary(%u ops)\n", pc->emit_size / 8); for (i = 0; i < pc->emit_size / 4; i += 2) { debug_printf("0x%08x ", pc->emit[i + 0]); @@ -344,7 +342,7 @@ nvc0_emit_program(struct nv_pc *pc) uint32_t *code = pc->emit; int n; - NOUVEAU_DBG("emitting program: size = %u\n", pc->emit_size); + NV50_DBGMSG(SHADER, "emitting program: size = %u\n", pc->emit_size); pc->emit_pos = 0; for (n = 0; n < pc->num_blocks; ++n) { @@ -365,11 +363,10 @@ nvc0_emit_program(struct nv_pc *pc) pc->emit = code; -#ifdef NOUVEAU_DEBUG +#if NV50_DEBUG & NV50_DEBUG_SHADER nvc0_pc_print_binary(pc); -#else - debug_printf("not printing binary\n"); #endif + return 0; } @@ -396,7 +393,7 @@ nvc0_generate_code(struct nvc0_translation_info *ti) ret = nvc0_tgsi_to_nc(pc, ti); if (ret) goto out; -#if NOUVEAU_DEBUG > 1 +#if NV50_DEBUG & NV50_DEBUG_PROG_IR nvc0_print_program(pc); #endif @@ -406,7 +403,7 @@ nvc0_generate_code(struct nvc0_translation_info *ti) ret = nvc0_pc_exec_pass0(pc); if (ret) goto out; -#ifdef NOUVEAU_DEBUG +#if NV50_DEBUG & NV50_DEBUG_PROG_IR nvc0_print_program(pc); #endif @@ -414,7 +411,7 @@ nvc0_generate_code(struct nvc0_translation_info *ti) ret = nvc0_pc_exec_pass1(pc); if (ret) goto out; -#if NOUVEAU_DEBUG > 1 +#if NV50_DEBUG & NV50_DEBUG_PROG_CFLOW nvc0_print_program(pc); nv_print_cfgraph(pc, "nvc0_shader_cfgraph.dot", 0); #endif @@ -444,7 +441,7 @@ nvc0_generate_code(struct nvc0_translation_info *ti) ti->prog->relocs = pc->reloc_entries; ti->prog->num_relocs = pc->num_relocs; - NOUVEAU_DBG("SHADER TRANSLATION - %s\n", ret ? "failure" : "success"); + NV50_DBGMSG(SHADER, "SHADER TRANSLATION - %s\n", ret ? "failed" : "success"); out: nv_pc_free_refs(pc); @@ -573,7 +570,7 @@ nvc0_insn_delete(struct nv_instruction *nvi) if (nvi == b->phi) { if (nvi->opcode != NV_OP_PHI) - NOUVEAU_DBG("NOTE: b->phi points to non-PHI instruction\n"); + NV50_DBGMSG(PROG_IR, "NOTE: b->phi points to non-PHI instruction\n"); assert(!nvi->prev); if (!nvi->next || nvi->next->opcode != NV_OP_PHI) diff --git a/src/gallium/drivers/nvc0/nvc0_pc.h b/src/gallium/drivers/nvc0/nvc0_pc.h index 3a5612a5fac..441692d766c 100644 --- a/src/gallium/drivers/nvc0/nvc0_pc.h +++ b/src/gallium/drivers/nvc0/nvc0_pc.h @@ -23,20 +23,7 @@ #ifndef __NVC0_COMPILER_H__ #define __NVC0_COMPILER_H__ -#include <stdio.h> - -#ifndef NOUVEAU_DBG -#ifdef NOUVEAU_DEBUG -# define NOUVEAU_DBG(args...) debug_printf(args); -#else -# define NOUVEAU_DBG(args...) -#endif -#endif - -#ifndef NOUVEAU_ERR -#define NOUVEAU_ERR(fmt, args...) \ - fprintf(stderr, "%s:%d - "fmt, __FUNCTION__, __LINE__, ##args); -#endif +#include "nv50/nv50_debug.h" #include "pipe/p_defines.h" #include "util/u_inlines.h" diff --git a/src/gallium/drivers/nvc0/nvc0_pc_emit.c b/src/gallium/drivers/nvc0/nvc0_pc_emit.c index 76ad40dbcf8..e35653280a1 100644 --- a/src/gallium/drivers/nvc0/nvc0_pc_emit.c +++ b/src/gallium/drivers/nvc0/nvc0_pc_emit.c @@ -715,6 +715,10 @@ emit_interp(struct nv_pc *pc, struct nv_instruction *i) if (i->opcode == NV_OP_PINTERP) { pc->emit[0] |= 0x040; SID(pc, i->src[1], 26); + + if (i->src[0]->value->reg.address >= 0x280 && + i->src[0]->value->reg.address <= 0x29c) + pc->emit[0] |= 0x080; /* XXX: ? */ } else { SID(pc, NULL, 26); } @@ -875,7 +879,9 @@ emit_st(struct nv_pc *pc, struct nv_instruction *i) void nvc0_emit_instruction(struct nv_pc *pc, struct nv_instruction *i) { +#if NV50_DEBUG & NV50_DEBUG_SHADER debug_printf("EMIT: "); nvc0_print_instruction(i); +#endif switch (i->opcode) { case NV_OP_VFETCH: diff --git a/src/gallium/drivers/nvc0/nvc0_pc_optimize.c b/src/gallium/drivers/nvc0/nvc0_pc_optimize.c index f7bf1680d09..7f5fbaff690 100644 --- a/src/gallium/drivers/nvc0/nvc0_pc_optimize.c +++ b/src/gallium/drivers/nvc0/nvc0_pc_optimize.c @@ -115,7 +115,7 @@ inst_is_noop(struct nv_instruction *nvi) return FALSE; if (nvi->src[0]->value->join->reg.id < 0) { - NOUVEAU_DBG("inst_is_noop: orphaned value detected\n"); + NV50_DBGMSG(PROG_IR, "inst_is_noop: orphaned value detected\n"); return TRUE; } @@ -178,7 +178,7 @@ nv_pc_pass_pre_emission(void *priv, struct nv_basic_block *b) } pc->emit_size += b->emit_size; -#ifdef NOUVEAU_DEBUG +#if NV50_DEBUG & NV50_DEBUG_PROG_IR if (!b->entry) debug_printf("BB:%i is now empty\n", b->id); else @@ -206,7 +206,7 @@ nvc0_pc_exec_pass2(struct nv_pc *pc) { int i, ret; - NOUVEAU_DBG("preparing %u blocks for emission\n", pc->num_blocks); + NV50_DBGMSG(PROG_IR, "preparing %u blocks for emission\n", pc->num_blocks); pc->num_blocks = 0; /* will reorder bb_list */ diff --git a/src/gallium/drivers/nvc0/nvc0_pc_regalloc.c b/src/gallium/drivers/nvc0/nvc0_pc_regalloc.c index f4afe083e2d..15bebb2134a 100644 --- a/src/gallium/drivers/nvc0/nvc0_pc_regalloc.c +++ b/src/gallium/drivers/nvc0/nvc0_pc_regalloc.c @@ -20,11 +20,11 @@ * SOFTWARE. */ -#define NOUVEAU_DEBUG 1 - -/* #define NVC0_RA_DEBUG_LIVEI */ -/* #define NVC0_RA_DEBUG_LIVE_SETS */ -/* #define NVC0_RA_DEBUG_JOIN */ +#if NV50_DEBUG & NV50_DEBUG_PROG_RA +# define NVC0_RA_DEBUG_LIVEI +# define NVC0_RA_DEBUG_LIVE_SETS +# define NVC0_RA_DEBUG_JOIN +#endif #include "nvc0_pc.h" #include "util/u_simple_list.h" @@ -504,7 +504,9 @@ pass_generate_phi_movs(struct nv_pc_pass *ctx, struct nv_basic_block *b) } if (pn != p && pn->exit) { - ctx->pc->current_block = b->in[n ? 0 : 1]; + assert(!b->in[!n]->exit || b->in[!n]->exit->terminator); + /* insert terminator (branch to ENDIF) in new else block */ + ctx->pc->current_block = pn; ni = new_instruction(ctx->pc, NV_OP_BRA); ni->target = b; ni->terminator = 1; @@ -965,7 +967,7 @@ nv_pc_pass1(struct nv_pc *pc, struct nv_basic_block *root) struct nv_pc_pass *ctx; int i, ret; - NOUVEAU_DBG("REGISTER ALLOCATION - entering\n"); + NV50_DBGMSG(PROG_RA, "REGISTER ALLOCATION - entering\n"); ctx = CALLOC_STRUCT(nv_pc_pass); if (!ctx) @@ -1031,7 +1033,7 @@ nv_pc_pass1(struct nv_pc *pc, struct nv_basic_block *root) for (i = 0; i < pc->num_values; ++i) livei_release(&pc->values[i]); - NOUVEAU_DBG("REGISTER ALLOCATION - leaving\n"); + NV50_DBGMSG(PROG_RA, "REGISTER ALLOCATION - leaving\n"); out: FREE(ctx->insns); diff --git a/src/gallium/drivers/nvc0/nvc0_program.c b/src/gallium/drivers/nvc0/nvc0_program.c index 3c59213176e..bcee027917e 100644 --- a/src/gallium/drivers/nvc0/nvc0_program.c +++ b/src/gallium/drivers/nvc0/nvc0_program.c @@ -23,8 +23,6 @@ #include "pipe/p_shader_tokens.h" #include "pipe/p_defines.h" -#define NOUVEAU_DEBUG - #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_util.h" #include "tgsi/tgsi_dump.h" @@ -225,6 +223,9 @@ nvc0_interp_mode(const struct tgsi_full_declaration *decl) if (decl->Declaration.Interpolate == TGSI_INTERPOLATE_PERSPECTIVE) mode = NVC0_INTERP_PERSPECTIVE; else + if (decl->Declaration.Semantic && decl->Semantic.Name == TGSI_SEMANTIC_COLOR) + mode = NVC0_INTERP_PERSPECTIVE; + else mode = NVC0_INTERP_LINEAR; if (decl->Declaration.Centroid) @@ -574,7 +575,7 @@ nvc0_prog_scan(struct nvc0_translation_info *ti) int ret; unsigned i; -#ifdef NOUVEAU_DEBUG +#if NV50_DEBUG & NV50_DEBUG_SHADER tgsi_dump(prog->pipe.tokens, 0); #endif @@ -691,12 +692,12 @@ nvc0_program_translate(struct nvc0_program *prog) if (ret) NOUVEAU_ERR("shader translation failed\n"); - { - unsigned i; - for (i = 0; i < sizeof(prog->hdr) / sizeof(prog->hdr[0]); ++i) - debug_printf("HDR[%02lx] = 0x%08x\n", - i * sizeof(prog->hdr[0]), prog->hdr[i]); - } +#if NV50_DEBUG & NV50_DEBUG_SHADER + unsigned i; + for (i = 0; i < sizeof(prog->hdr) / sizeof(prog->hdr[0]); ++i) + debug_printf("HDR[%02lx] = 0x%08x\n", + i * sizeof(prog->hdr[0]), prog->hdr[i]); +#endif out: if (ti->immd32) diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c index 1047ba3c337..ca0691d2aee 100644 --- a/src/gallium/drivers/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nvc0/nvc0_screen.c @@ -20,6 +20,7 @@ * SOFTWARE. */ +#include "util/u_format.h" #include "util/u_format_s3tc.h" #include "pipe/p_screen.h" @@ -39,17 +40,8 @@ nvc0_screen_is_format_supported(struct pipe_screen *pscreen, if (sample_count > 1) return FALSE; - if (!util_format_s3tc_enabled) { - switch (format) { - case PIPE_FORMAT_DXT1_RGB: - case PIPE_FORMAT_DXT1_RGBA: - case PIPE_FORMAT_DXT3_RGBA: - case PIPE_FORMAT_DXT5_RGBA: - return FALSE; - default: - break; - } - } + if (!util_format_is_supported(format, bindings)) + return FALSE; /* transfers & shared are always supported */ bindings &= ~(PIPE_BIND_TRANSFER_READ | @@ -93,6 +85,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 1; case PIPE_CAP_MAX_RENDER_TARGETS: return 8; + case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL: + return 1; case PIPE_CAP_TIMER_QUERY: case PIPE_CAP_OCCLUSION_QUERY: return 1; @@ -113,6 +107,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_PRIMITIVE_RESTART: case PIPE_CAP_TGSI_INSTANCEID: case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: + case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: return 1; default: NOUVEAU_ERR("unknown PIPE_CAP %d\n", param); @@ -291,8 +286,6 @@ nvc0_magic_3d_init(struct nouveau_channel *chan) OUT_RING (chan, 1 << 12); BEGIN_RING(chan, RING_3D_(0x151c), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, RING_3D_(0x020c), 1); - OUT_RING (chan, 1); BEGIN_RING(chan, RING_3D_(0x030c), 1); OUT_RING (chan, 0); BEGIN_RING(chan, RING_3D_(0x0300), 1); @@ -309,11 +302,6 @@ nvc0_magic_3d_init(struct nouveau_channel *chan) OUT_RING (chan, 1); BEGIN_RING(chan, RING_3D_(0x075c), 1); OUT_RING (chan, 3); - - BEGIN_RING(chan, RING_3D_(0x0fac), 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, RING_3D_(0x0f90), 1); - OUT_RING (chan, 0); } static void @@ -445,6 +433,14 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) OUT_RING (chan, NVC0_3D_MULTISAMPLE_MODE_1X); BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1); OUT_RING (chan, 0); + BEGIN_RING(chan, RING_3D(LINE_WIDTH_SEPARATE), 1); + OUT_RING (chan, 1); + BEGIN_RING(chan, RING_3D(LINE_LAST_PIXEL), 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, RING_3D(BLEND_SEPARATE_ALPHA), 1); + OUT_RING (chan, 1); + BEGIN_RING(chan, RING_3D(BLEND_ENABLE_COMMON), 1); + OUT_RING (chan, 0); nvc0_magic_3d_init(chan); @@ -452,7 +448,10 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) if (ret) goto fail; - nouveau_resource_init(&screen->text_heap, 0, 1 << 20); + /* XXX: getting a page fault at the end of the code buffer every few + * launches, don't use the last 256 bytes to work around them - prefetch ? + */ + nouveau_resource_init(&screen->text_heap, 0, (1 << 20) - 0x100); ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16, &screen->uniforms); @@ -557,17 +556,6 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) OUT_RING (chan, 8192 << 16); OUT_RING (chan, 8192 << 16); - BEGIN_RING(chan, RING_3D_(0x0fac), 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, RING_3D_(0x3484), 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, RING_3D_(0x0dbc), 1); - OUT_RING (chan, 0x00010000); - BEGIN_RING(chan, RING_3D_(0x0dd8), 1); - OUT_RING (chan, 0xff800006); - BEGIN_RING(chan, RING_3D_(0x3488), 1); - OUT_RING (chan, 0); - #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n); i = 0; @@ -577,10 +565,11 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) MK_MACRO(NVC0_3D_GP_SELECT, nvc0_9097_gp_select); MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front); MK_MACRO(NVC0_3D_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back); - MK_MACRO(NVC0_3D_COLOR_MASK_BROADCAST, nvc0_9097_color_mask_brdc); BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1); OUT_RING (chan, 1); + BEGIN_RING(chan, RING_3D(RT_SEPARATE_FRAG_DATA), 1); + OUT_RING (chan, 1); BEGIN_RING(chan, RING_3D(GP_SELECT), 1); OUT_RING (chan, 0x40); BEGIN_RING(chan, RING_3D(LAYER), 1); @@ -599,8 +588,6 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) BEGIN_RING(chan, RING_3D(POINT_RASTER_RULES), 1); OUT_RING (chan, NVC0_3D_POINT_RASTER_RULES_OGL); - BEGIN_RING(chan, RING_3D(FRAG_COLOR_CLAMP_EN), 1); - OUT_RING (chan, 0x11111111); BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1); OUT_RING (chan, 1); diff --git a/src/gallium/drivers/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nvc0/nvc0_shader_state.c index 7294eaa222e..287160e0b2a 100644 --- a/src/gallium/drivers/nvc0/nvc0_shader_state.c +++ b/src/gallium/drivers/nvc0/nvc0_shader_state.c @@ -97,8 +97,6 @@ nvc0_vertprog_validate(struct nvc0_context *nvc0) // BEGIN_RING(chan, RING_3D_(0x163c), 1); // OUT_RING (chan, 0); - BEGIN_RING(chan, RING_3D(VERT_COLOR_CLAMP_EN), 1); - OUT_RING (chan, 1); } void diff --git a/src/gallium/drivers/nvc0/nvc0_state.c b/src/gallium/drivers/nvc0/nvc0_state.c index ab68abcfb5a..b0b2065167e 100644 --- a/src/gallium/drivers/nvc0/nvc0_state.c +++ b/src/gallium/drivers/nvc0/nvc0_state.c @@ -93,9 +93,18 @@ nvc0_blend_state_create(struct pipe_context *pipe, SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable); + if (!cso->logicop_enable) + SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0); + + if (cso->logicop_enable) { + SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2); + SB_DATA (so, 1); + SB_DATA (so, nvgl_logicop_func(cso->logicop_func)); + + SB_IMMED_3D(so, BLEND_ENABLES, 0); + } else if (!cso->independent_blend_enable) { - SB_BEGIN_3D(so, BLEND_ENABLES, 1); - SB_DATA (so, cso->rt[0].blend_enable ? 0xff : 0); + SB_IMMED_3D(so, BLEND_ENABLES, cso->rt[0].blend_enable ? 0xff : 0); if (cso->rt[0].blend_enable) { SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5); @@ -108,7 +117,8 @@ nvc0_blend_state_create(struct pipe_context *pipe, SB_DATA (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor)); } - SB_BEGIN_3D(so, COLOR_MASK_BROADCAST, 1); + SB_IMMED_3D(so, COLOR_MASK_COMMON, 1); + SB_BEGIN_3D(so, COLOR_MASK(0), 1); SB_DATA (so, nvc0_colormask(cso->rt[0].colormask)); } else { uint8_t en = 0; @@ -126,23 +136,15 @@ nvc0_blend_state_create(struct pipe_context *pipe, SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor)); SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor)); } - SB_BEGIN_3D(so, BLEND_ENABLES, 1); - SB_DATA (so, en); + SB_IMMED_3D(so, BLEND_ENABLES, en); + SB_IMMED_3D(so, COLOR_MASK_COMMON, 0); SB_BEGIN_3D(so, COLOR_MASK(0), 8); for (i = 0; i < 8; ++i) SB_DATA(so, nvc0_colormask(cso->rt[i].colormask)); } - if (cso->logicop_enable) { - SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2); - SB_DATA (so, 1); - SB_DATA (so, nvgl_logicop_func(cso->logicop_func)); - } else { - SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0); - } - - assert(so->size < (sizeof(so->state) / sizeof(so->state[0]))); + assert(so->size <= (sizeof(so->state) / sizeof(so->state[0]))); return so; } @@ -161,6 +163,7 @@ nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso) FREE(hwcso); } +/* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */ static void * nvc0_rasterizer_state_create(struct pipe_context *pipe, const struct pipe_rasterizer_state *cso) @@ -183,19 +186,23 @@ nvc0_rasterizer_state_create(struct pipe_context *pipe, SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first); SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside); - SB_BEGIN_3D(so, LINE_WIDTH, 1); - SB_DATA (so, fui(cso->line_width)); + SB_IMMED_3D(so, VERT_COLOR_CLAMP_EN, cso->clamp_vertex_color); + SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1); + SB_DATA (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000); + SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth); + if (cso->line_smooth) + SB_BEGIN_3D(so, LINE_WIDTH_SMOOTH, 1); + else + SB_BEGIN_3D(so, LINE_WIDTH_ALIASED, 1); + SB_DATA (so, fui(cso->line_width)); - SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1); + SB_IMMED_3D(so, LINE_STIPPLE_ENABLE, cso->line_stipple_enable); if (cso->line_stipple_enable) { - SB_DATA (so, 1); SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1); SB_DATA (so, (cso->line_stipple_pattern << 8) | cso->line_stipple_factor); - } else { - SB_DATA (so, 0); } SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex); @@ -249,7 +256,7 @@ nvc0_rasterizer_state_create(struct pipe_context *pipe, SB_DATA (so, fui(cso->offset_units * 2.0f)); } - assert(so->size < (sizeof(so->state) / sizeof(so->state[0]))); + assert(so->size <= (sizeof(so->state) / sizeof(so->state[0]))); return (void *)so; } @@ -320,7 +327,7 @@ nvc0_zsa_state_create(struct pipe_context *pipe, SB_DATA (so, nvgl_comparison_op(cso->alpha.func)); } - assert(so->size < (sizeof(so->state) / sizeof(so->state[0]))); + assert(so->size <= (sizeof(so->state) / sizeof(so->state[0]))); return (void *)so; } diff --git a/src/gallium/drivers/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nvc0/nvc0_state_validate.c index bb81480bab9..9b2a28150b1 100644 --- a/src/gallium/drivers/nvc0/nvc0_state_validate.c +++ b/src/gallium/drivers/nvc0/nvc0_state_validate.c @@ -1,6 +1,7 @@ +#include "util/u_math.h" + #include "nvc0_context.h" -#include "os/os_time.h" static void nvc0_validate_zcull(struct nvc0_context *nvc0) @@ -156,11 +157,10 @@ static void nvc0_validate_stencil_ref(struct nvc0_context *nvc0) { struct nouveau_channel *chan = nvc0->screen->base.channel; + const ubyte *ref = &nvc0->stencil_ref.ref_value[0]; - BEGIN_RING(chan, RING_3D(STENCIL_FRONT_FUNC_REF), 1); - OUT_RING (chan, nvc0->stencil_ref.ref_value[0]); - BEGIN_RING(chan, RING_3D(STENCIL_BACK_FUNC_REF), 1); - OUT_RING (chan, nvc0->stencil_ref.ref_value[1]); + IMMED_RING(chan, RING_3D(STENCIL_FRONT_FUNC_REF), ref[0]); + IMMED_RING(chan, RING_3D(STENCIL_BACK_FUNC_REF), ref[1]); } static void @@ -214,10 +214,11 @@ nvc0_validate_viewport(struct nvc0_context *nvc0) /* now set the viewport rectangle to viewport dimensions for clipping */ - x = (int)(vp->translate[0] - fabsf(vp->scale[0])); - y = (int)(vp->translate[1] - fabsf(vp->scale[1])); - w = (int)fabsf(2.0f * vp->scale[0]); - h = (int)fabsf(2.0f * vp->scale[1]); + x = util_iround(MAX2(0.0f, vp->translate[0] - fabsf(vp->scale[0]))); + y = util_iround(MAX2(0.0f, vp->translate[1] - fabsf(vp->scale[1]))); + w = util_iround(vp->translate[0] + fabsf(vp->scale[0])) - x; + h = util_iround(vp->translate[1] + fabsf(vp->scale[1])) - y; + zmin = vp->translate[2] - fabsf(vp->scale[2]); zmax = vp->translate[2] + fabsf(vp->scale[2]); diff --git a/src/gallium/drivers/nvc0/nvc0_stateobj.h b/src/gallium/drivers/nvc0/nvc0_stateobj.h index 8222f9375ee..e0fe9df25d7 100644 --- a/src/gallium/drivers/nvc0/nvc0_stateobj.h +++ b/src/gallium/drivers/nvc0/nvc0_stateobj.h @@ -19,19 +19,19 @@ struct nvc0_blend_stateobj { struct pipe_blend_state pipe; int size; - uint32_t state[72]; + uint32_t state[70]; }; struct nvc0_rasterizer_stateobj { struct pipe_rasterizer_state pipe; int size; - uint32_t state[36]; + uint32_t state[38]; }; struct nvc0_zsa_stateobj { struct pipe_depth_stencil_alpha_state pipe; int size; - uint32_t state[29]; + uint32_t state[26]; }; struct nvc0_vertex_element { diff --git a/src/gallium/drivers/nvc0/nvc0_surface.c b/src/gallium/drivers/nvc0/nvc0_surface.c index fc5f45ea25d..6be3702bddc 100644 --- a/src/gallium/drivers/nvc0/nvc0_surface.c +++ b/src/gallium/drivers/nvc0/nvc0_surface.c @@ -27,6 +27,7 @@ #include "util/u_inlines.h" #include "util/u_pack_color.h" #include "util/u_format.h" +#include "util/u_surface.h" #include "nvc0_context.h" #include "nvc0_resource.h" @@ -234,6 +235,13 @@ nvc0_resource_copy_region(struct pipe_context *pipe, int ret; unsigned dst_layer = dstz, src_layer = src_box->z; + /* Fallback for buffers. */ + if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { + util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz, + src, src_level, src_box); + return; + } + nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; if (src->format == dst->format) { diff --git a/src/gallium/drivers/nvc0/nvc0_tgsi_to_nc.c b/src/gallium/drivers/nvc0/nvc0_tgsi_to_nc.c index a44d330c731..d57be916696 100644 --- a/src/gallium/drivers/nvc0/nvc0_tgsi_to_nc.c +++ b/src/gallium/drivers/nvc0/nvc0_tgsi_to_nc.c @@ -22,8 +22,6 @@ #include <unistd.h> -#define NOUVEAU_DEBUG 1 - #include "pipe/p_shader_tokens.h" #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_util.h" @@ -200,7 +198,7 @@ static INLINE void bld_warn_uninitialized(struct bld_context *bld, int kind, struct bld_register *reg, struct nv_basic_block *b) { -#ifdef NOUVEAU_DEBUG +#if NV50_DEBUG & NV50_DEBUG_SHADER long i = (reg - &bld->tvs[0][0]) / 4; long c = (reg - &bld->tvs[0][0]) & 3; @@ -259,6 +257,12 @@ fetch_by_bb(struct bld_register *reg, fetch_by_bb(reg, vals, n, b->in[i]); } +static INLINE boolean +nvc0_bblock_is_terminated(struct nv_basic_block *bb) +{ + return bb->exit && bb->exit->terminator; +} + static INLINE struct nv_value * bld_load_imm_u32(struct bld_context *bld, uint32_t u); @@ -1465,7 +1469,7 @@ bld_instruction(struct bld_context *bld, uint opcode = translate_opcode(insn->Instruction.Opcode); uint8_t mask = insn->Dst[0].Register.WriteMask; -#ifdef NOUVEAU_DEBUG +#if NV50_DEBUG & NV50_DEBUG_PROG_IR debug_printf("bld_instruction:"); tgsi_dump_instruction(insn, 1); #endif @@ -1637,8 +1641,7 @@ bld_instruction(struct bld_context *bld, { struct nv_basic_block *b = new_basic_block(bld->pc); - if (bld->pc->current_block->exit && - !bld->pc->current_block->exit->terminator) + if (!nvc0_bblock_is_terminated(bld->pc->current_block)) bld_flow(bld, NV_OP_BRA, NULL, NV_CC_P, b, FALSE); --bld->cond_lvl; |