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-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir_emit_nv50.cpp3
-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir_target_nv50.cpp6
2 files changed, 9 insertions, 0 deletions
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_emit_nv50.cpp
index bc4657c13b6..90ec9d0c74b 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_emit_nv50.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_emit_nv50.cpp
@@ -1284,6 +1284,9 @@ CodeEmitterNV50::emitLogicOp(const Instruction *i)
assert(i->op == OP_AND);
break;
}
+ if (i->src(0).mod & Modifier(NV50_IR_MOD_NOT))
+ code[0] |= 1 << 22;
+
emitForm_IMM(i);
} else {
switch (i->op) {
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_target_nv50.cpp
index 8b11c6a2fdd..6b4175edfcf 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_target_nv50.cpp
@@ -323,6 +323,12 @@ TargetNV50::insnCanLoad(const Instruction *i, int s,
ldSize = typeSizeof(ld->dType);
}
+ if (sf == FILE_IMMEDIATE)
+ return true;
+
+
+ // Check if memory access is encodable:
+
if (ldSize < 4 && sf == FILE_SHADER_INPUT) // no < 4-byte aligned a[] access
return false;
if (ld->getSrc(0)->reg.data.offset > (int32_t)(127 * ldSize))