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-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir_driver.h5
-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir_inlines.h25
-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp1
-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir_target.cpp1
4 files changed, 32 insertions, 0 deletions
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_driver.h b/src/gallium/drivers/nv50/codegen/nv50_ir_driver.h
index 9632986fe40..446befa5fb7 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_driver.h
@@ -93,6 +93,11 @@ struct nv50_ir_prog_symbol
uint32_t offset;
};
+#define NVISA_GF100_CHIPSET_C0 0xc0
+#define NVISA_GF100_CHIPSET_D0 0xd0
+#define NVISA_GK104_CHIPSET 0xe0
+#define NVISA_GK110_CHIPSET 0xf0
+
struct nv50_ir_prog_info
{
uint16_t target; /* chipset (0x50, 0x84, 0xc0, ...) */
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_inlines.h b/src/gallium/drivers/nv50/codegen/nv50_ir_inlines.h
index ab4c98fbcd7..55a3332c727 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_inlines.h
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_inlines.h
@@ -73,6 +73,31 @@ static inline unsigned int typeSizeof(DataType ty)
}
}
+static inline unsigned int typeSizeofLog2(DataType ty)
+{
+ switch (ty) {
+ case TYPE_F16:
+ case TYPE_U16:
+ case TYPE_S16:
+ return 1;
+ case TYPE_F32:
+ case TYPE_U32:
+ case TYPE_S32:
+ return 2;
+ case TYPE_F64:
+ case TYPE_U64:
+ case TYPE_S64:
+ return 3;
+ case TYPE_B96:
+ case TYPE_B128:
+ return 4;
+ case TYPE_U8:
+ case TYPE_S8:
+ default:
+ return 0;
+ }
+}
+
static inline DataType typeOfSize(unsigned int size,
bool flt = false, bool sgn = false)
{
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
index 726331e91e7..13998767710 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
@@ -1907,6 +1907,7 @@ RegAlloc::InsertConstraintsPass::visit(BasicBlock *bb)
texConstraintNVC0(tex);
break;
case 0xe0:
+ case NVISA_GK110_CHIPSET:
texConstraintNVE0(tex);
break;
default:
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_target.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_target.cpp
index f718912fb39..707c9e8d219 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_target.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_target.cpp
@@ -121,6 +121,7 @@ Target *Target::create(unsigned int chipset)
case 0xc0:
case 0xd0:
case 0xe0:
+ case NVISA_GK110_CHIPSET:
return getTargetNVC0(chipset);
case 0x50:
case 0x80: