diff options
Diffstat (limited to 'src/gallium/drivers/nv50')
| -rw-r--r-- | src/gallium/drivers/nv50/nv50_context.c | 21 | ||||
| -rw-r--r-- | src/gallium/drivers/nv50/nv50_state_validate.c | 5 |
2 files changed, 11 insertions, 15 deletions
diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c index 204e9bef113..930cee7c1e7 100644 --- a/src/gallium/drivers/nv50/nv50_context.c +++ b/src/gallium/drivers/nv50/nv50_context.c @@ -33,22 +33,17 @@ static void nv50_flush(struct pipe_context *pipe, struct pipe_fence_handle **fence) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nouveau_channel *chan = nv50->screen->base.channel; - - /* XXX This flag wasn't set by the state tracker anyway. */ - /*if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - BEGIN_RING(chan, RING_3D_(NV50_GRAPH_WAIT_FOR_IDLE), 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, RING_3D(TEX_CACHE_CTL), 1); - OUT_RING (chan, 0x20); - }*/ + struct nouveau_screen *screen = &nv50_context(pipe)->screen->base; if (fence) - nouveau_fence_ref(nv50->screen->base.fence.current, - (struct nouveau_fence **)fence); + nouveau_fence_ref(screen->fence.current, (struct nouveau_fence **)fence); + + /* Try to emit before firing to avoid having to flush again right after + * in case we have to wait on this fence. + */ + nouveau_fence_emit(screen->fence.current); - FIRE_RING(chan); + FIRE_RING(screen->channel); } void diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index bf46296e7ef..4ae58b156b6 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -43,8 +43,9 @@ nv50_validate_fb(struct nv50_context *nv50) mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; mt->base.status &= NOUVEAU_BUFFER_STATUS_GPU_READING; + /* only register for writing, otherwise we'd always serialize here */ nv50_bufctx_add_resident(nv50, NV50_BUFCTX_FRAME, &mt->base, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); } if (fb->zsbuf) { @@ -74,7 +75,7 @@ nv50_validate_fb(struct nv50_context *nv50) mt->base.status &= NOUVEAU_BUFFER_STATUS_GPU_READING; nv50_bufctx_add_resident(nv50, NV50_BUFCTX_FRAME, &mt->base, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); } else { BEGIN_RING(chan, RING_3D(ZETA_ENABLE), 1); OUT_RING (chan, 0); |