diff options
Diffstat (limited to 'src/gallium/drivers/nv50/nv50_tex.c')
| -rw-r--r-- | src/gallium/drivers/nv50/nv50_tex.c | 75 |
1 files changed, 60 insertions, 15 deletions
diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c index e12a6ad648b..417d3679422 100644 --- a/src/gallium/drivers/nv50/nv50_tex.c +++ b/src/gallium/drivers/nv50/nv50_tex.c @@ -25,16 +25,18 @@ #include "nouveau/nouveau_stateobj.h" -#define _(pf, tt, r, g, b, a, tf) \ +#define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f) \ { \ PIPE_FORMAT_##pf, \ - NV50TIC_0_0_MAPR_##r | NV50TIC_0_0_TYPER_##tt | \ - NV50TIC_0_0_MAPG_##g | NV50TIC_0_0_TYPEG_##tt | \ - NV50TIC_0_0_MAPB_##b | NV50TIC_0_0_TYPEB_##tt | \ - NV50TIC_0_0_MAPA_##a | NV50TIC_0_0_TYPEA_##tt | \ - NV50TIC_0_0_FMT_##tf \ + NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 | \ + NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 | \ + NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 | \ + NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 | \ + NV50TIC_0_0_FMT_##f \ } +#define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f) + struct nv50_texture_format { enum pipe_format pf; uint32_t hw; @@ -46,7 +48,9 @@ struct nv50_texture_format { static const struct nv50_texture_format nv50_tex_format_list[] = { _(A8R8G8B8_UNORM, UNORM, C2, C1, C0, C3, 8_8_8_8), + _(A8R8G8B8_SRGB, UNORM, C2, C1, C0, C3, 8_8_8_8), _(X8R8G8B8_UNORM, UNORM, C2, C1, C0, ONE, 8_8_8_8), + _(X8R8G8B8_SRGB, UNORM, C2, C1, C0, ONE, 8_8_8_8), _(A1R5G5B5_UNORM, UNORM, C2, C1, C0, C3, 1_5_5_5), _(A4R4G4B4_UNORM, UNORM, C2, C1, C0, C3, 4_4_4_4), @@ -61,16 +65,30 @@ static const struct nv50_texture_format nv50_tex_format_list[] = _(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1), _(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1), _(DXT3_RGBA, UNORM, C0, C1, C2, C3, DXT3), - _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5) + _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5), + + _MIXED(Z24S8_UNORM, UINT, UNORM, UINT, UINT, C1, C1, C1, ONE, 24_8), + + _(R16G16B16A16_SNORM, UNORM, C0, C1, C2, C3, 16_16_16_16), + _(R16G16B16A16_UNORM, SNORM, C0, C1, C2, C3, 16_16_16_16), + _(R32G32B32A32_FLOAT, FLOAT, C0, C1, C2, C3, 32_32_32_32), + + _(R16G16_SNORM, SNORM, C0, C1, ZERO, ONE, 16_16), + _(R16G16_UNORM, UNORM, C0, C1, ZERO, ONE, 16_16), + + _MIXED(Z32_FLOAT, FLOAT, UINT, UINT, UINT, C0, C0, C0, ONE, 32_DEPTH) + }; #undef _ +#undef _MIXED static int nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so, struct nv50_miptree *mt, int unit) { unsigned i; + uint32_t mode; for (i = 0; i < NV50_TEX_FORMAT_LIST_SIZE; i++) if (nv50_tex_format_list[i].pf == mt->base.base.format) @@ -78,17 +96,44 @@ nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so, if (i == NV50_TEX_FORMAT_LIST_SIZE) return 1; + if (nv50->sampler[unit]->normalized) + mode = 0x50001000 | (1 << 31); + else { + mode = 0x50001000 | (7 << 14); + assert(mt->base.base.target == PIPE_TEXTURE_2D); + } + + mode |= ((mt->base.bo->tile_mode & 0x0f) << 22) | + ((mt->base.bo->tile_mode & 0xf0) << 21); + + if (pf_type(mt->base.base.format) == PIPE_FORMAT_TYPE_SRGB) + mode |= 0x0400; + + switch (mt->base.base.target) { + case PIPE_TEXTURE_1D: + break; + case PIPE_TEXTURE_2D: + mode |= (1 << 14); + break; + case PIPE_TEXTURE_3D: + mode |= (2 << 14); + break; + case PIPE_TEXTURE_CUBE: + mode |= (3 << 14); + break; + default: + assert(!"unsupported texture target"); + break; + } + so_data (so, nv50_tex_format_list[i].hw); so_reloc(so, mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW | - NOUVEAU_BO_RD, 0, 0); - if (nv50->sampler[unit]->normalized) - so_data (so, 0xd0005000 | mt->base.bo->tile_mode << 22); - else - so_data (so, 0x5001d000 | mt->base.bo->tile_mode << 22); + NOUVEAU_BO_RD, 0, 0); + so_data (so, mode); so_data (so, 0x00300000); - so_data (so, mt->base.base.width[0]); + so_data (so, mt->base.base.width0 | (1 << 31)); so_data (so, (mt->base.base.last_level << 28) | - (mt->base.base.depth[0] << 16) | mt->base.base.height[0]); + (mt->base.base.depth0 << 16) | mt->base.base.height0); so_data (so, 0x03000000); so_data (so, mt->base.base.last_level << 4); @@ -104,7 +149,7 @@ nv50_tex_validate(struct nv50_context *nv50) unsigned i, unit, push; push = MAX2(nv50->miptree_nr, nv50->state.miptree_nr) * 2 + 23 + 6; - so = so_new(nv50->miptree_nr * 9 + push, nv50->miptree_nr + 2); + so = so_new(nv50->miptree_nr * 9 + push, nv50->miptree_nr * 2 + 2); nv50_so_init_sifc(nv50, so, nv50->screen->tic, NOUVEAU_BO_VRAM, nv50->miptree_nr * 8 * 4); |