aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/nv04
diff options
context:
space:
mode:
Diffstat (limited to 'src/gallium/drivers/nv04')
-rw-r--r--src/gallium/drivers/nv04/Makefile12
-rw-r--r--src/gallium/drivers/nv04/nv04_miptree.c78
-rw-r--r--src/gallium/drivers/nv04/nv04_prim_vbuf.c24
-rw-r--r--src/gallium/drivers/nv04/nv04_screen.c26
-rw-r--r--src/gallium/drivers/nv04/nv04_screen.h3
-rw-r--r--src/gallium/drivers/nv04/nv04_state.h3
-rw-r--r--src/gallium/drivers/nv04/nv04_state_emit.c17
-rw-r--r--src/gallium/drivers/nv04/nv04_surface.c11
-rw-r--r--src/gallium/drivers/nv04/nv04_surface_2d.c61
-rw-r--r--src/gallium/drivers/nv04/nv04_surface_2d.h5
-rw-r--r--src/gallium/drivers/nv04/nv04_transfer.c196
11 files changed, 303 insertions, 133 deletions
diff --git a/src/gallium/drivers/nv04/Makefile b/src/gallium/drivers/nv04/Makefile
index 4ed62dae95d..7c14bacb1de 100644
--- a/src/gallium/drivers/nv04/Makefile
+++ b/src/gallium/drivers/nv04/Makefile
@@ -3,7 +3,7 @@ include $(TOP)/configs/current
LIBNAME = nv04
-DRIVER_SOURCES = \
+C_SOURCES = \
nv04_surface_2d.c \
nv04_clear.c \
nv04_context.c \
@@ -15,15 +15,7 @@ DRIVER_SOURCES = \
nv04_state.c \
nv04_state_emit.c \
nv04_surface.c \
+ nv04_transfer.c \
nv04_vbo.c
-C_SOURCES = \
- $(COMMON_SOURCES) \
- $(DRIVER_SOURCES)
-
-ASM_SOURCES =
-
include ../../Makefile.template
-
-symlinks:
-
diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c
index 993c5ef5dd2..85dc017fbc4 100644
--- a/src/gallium/drivers/nv04/nv04_miptree.c
+++ b/src/gallium/drivers/nv04/nv04_miptree.c
@@ -41,23 +41,20 @@ nv04_miptree_layout(struct nv04_miptree *nv04mt)
static struct pipe_texture *
nv04_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt)
{
- struct pipe_winsys *ws = pscreen->winsys;
struct nv04_miptree *mt;
mt = MALLOC(sizeof(struct nv04_miptree));
if (!mt)
return NULL;
mt->base = *pt;
- mt->base.refcount = 1;
+ pipe_reference_init(&mt->base.reference, 1);
mt->base.screen = pscreen;
- mt->shadow_tex = NULL;
- mt->shadow_surface = NULL;
//mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
nv04_miptree_layout(mt);
- mt->buffer = ws->buffer_create(ws, 256, PIPE_BUFFER_USAGE_PIXEL |
+ mt->buffer = pscreen->buffer_create(pscreen, 256, PIPE_BUFFER_USAGE_PIXEL |
NOUVEAU_BUFFER_USAGE_TEXTURE,
mt->total_size);
if (!mt->buffer) {
@@ -85,38 +82,27 @@ nv04_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
return NULL;
mt->base = *pt;
- mt->base.refcount = 1;
+ pipe_reference_init(&mt->base.reference, 1);
mt->base.screen = pscreen;
mt->level[0].pitch = stride[0];
mt->level[0].image_offset = CALLOC(1, sizeof(unsigned));
- pipe_buffer_reference(pscreen, &mt->buffer, pb);
+ pipe_buffer_reference(&mt->buffer, pb);
return &mt->base;
}
static void
-nv04_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt)
+nv04_miptree_destroy(struct pipe_texture *pt)
{
- struct pipe_texture *pt = *ppt;
struct nv04_miptree *mt = (struct nv04_miptree *)pt;
int l;
- *ppt = NULL;
- if (--pt->refcount)
- return;
-
- pipe_buffer_reference(pscreen, &mt->buffer, NULL);
+ pipe_buffer_reference(&mt->buffer, NULL);
for (l = 0; l <= pt->last_level; l++) {
if (mt->level[l].image_offset)
FREE(mt->level[l].image_offset);
}
- if (mt->shadow_tex) {
- assert(mt->shadow_surface);
- pscreen->tex_surface_release(pscreen, &mt->shadow_surface);
- nv04_miptree_release(pscreen, &mt->shadow_tex);
- }
-
FREE(mt);
}
@@ -126,41 +112,31 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
unsigned flags)
{
struct nv04_miptree *nv04mt = (struct nv04_miptree *)pt;
- struct pipe_surface *ps;
+ struct nv04_surface *ns;
- ps = CALLOC_STRUCT(pipe_surface);
- if (!ps)
+ ns = CALLOC_STRUCT(nv04_surface);
+ if (!ns)
return NULL;
- pipe_texture_reference(&ps->texture, pt);
- ps->format = pt->format;
- ps->width = pt->width[level];
- ps->height = pt->height[level];
- ps->block = pt->block;
- ps->nblocksx = pt->nblocksx[level];
- ps->nblocksy = pt->nblocksy[level];
- ps->stride = nv04mt->level[level].pitch;
- ps->usage = flags;
- ps->status = PIPE_SURFACE_STATUS_DEFINED;
- ps->refcount = 1;
- ps->face = face;
- ps->level = level;
- ps->zslice = zslice;
-
- ps->offset = nv04mt->level[level].image_offset;
-
- return ps;
+ pipe_texture_reference(&ns->base.texture, pt);
+ ns->base.format = pt->format;
+ ns->base.width = pt->width[level];
+ ns->base.height = pt->height[level];
+ ns->base.usage = flags;
+ ns->base.status = PIPE_SURFACE_STATUS_DEFINED;
+ pipe_reference_init(&ns->base.reference, 1);
+ ns->base.face = face;
+ ns->base.level = level;
+ ns->base.zslice = zslice;
+ ns->pitch = nv04mt->level[level].pitch;
+
+ ns->base.offset = nv04mt->level[level].image_offset;
+
+ return &ns->base;
}
static void
-nv04_miptree_surface_del(struct pipe_screen *pscreen,
- struct pipe_surface **psurface)
+nv04_miptree_surface_del(struct pipe_surface *ps)
{
- struct pipe_surface *ps = *psurface;
-
- *psurface = NULL;
- if (--ps->refcount > 0)
- return;
-
pipe_texture_reference(&ps->texture, NULL);
FREE(ps);
}
@@ -170,8 +146,8 @@ nv04_screen_init_miptree_functions(struct pipe_screen *pscreen)
{
pscreen->texture_create = nv04_miptree_create;
pscreen->texture_blanket = nv04_miptree_blanket;
- pscreen->texture_release = nv04_miptree_release;
+ pscreen->texture_destroy = nv04_miptree_destroy;
pscreen->get_tex_surface = nv04_miptree_surface_new;
- pscreen->tex_surface_release = nv04_miptree_surface_del;
+ pscreen->tex_surface_destroy = nv04_miptree_surface_del;
}
diff --git a/src/gallium/drivers/nv04/nv04_prim_vbuf.c b/src/gallium/drivers/nv04/nv04_prim_vbuf.c
index 18a8872ae38..f6458232ae5 100644
--- a/src/gallium/drivers/nv04/nv04_prim_vbuf.c
+++ b/src/gallium/drivers/nv04/nv04_prim_vbuf.c
@@ -1,5 +1,5 @@
-#include "pipe/p_debug.h"
+#include "util/u_debug.h"
#include "pipe/p_inlines.h"
#include "pipe/internal/p_winsys_screen.h"
#include "pipe/p_compiler.h"
@@ -51,7 +51,7 @@ nv04_vbuf_render_get_vertex_info( struct vbuf_render *render )
}
-static void *
+static boolean
nv04_vbuf_render_allocate_vertices( struct vbuf_render *render,
ushort vertex_size,
ushort nr_vertices )
@@ -61,9 +61,22 @@ nv04_vbuf_render_allocate_vertices( struct vbuf_render *render,
nv04_render->buffer = (unsigned char*) MALLOC(VERTEX_BUFFER_SIZE);
assert(!nv04_render->buffer);
+ return nv04_render->buffer ? TRUE : FALSE;
+}
+
+static void *
+nv04_vbuf_render_map_vertices( struct vbuf_render *render )
+{
+ struct nv04_vbuf_render *nv04_render = nv04_vbuf_render(render);
return nv04_render->buffer;
}
+static void
+nv04_vbuf_render_unmap_vertices( struct vbuf_render *render,
+ ushort min_index,
+ ushort max_index )
+{
+}
static boolean
nv04_vbuf_render_set_primitive( struct vbuf_render *render,
@@ -244,10 +257,7 @@ nv04_vbuf_render_draw( struct vbuf_render *render,
static void
-nv04_vbuf_render_release_vertices( struct vbuf_render *render,
- void *vertices,
- unsigned vertex_size,
- unsigned vertices_used )
+nv04_vbuf_render_release_vertices( struct vbuf_render *render )
{
struct nv04_vbuf_render *nv04_render = nv04_vbuf_render(render);
@@ -278,6 +288,8 @@ nv04_vbuf_render_create( struct nv04_context *nv04 )
nv04_render->base.max_indices = 65536;
nv04_render->base.get_vertex_info = nv04_vbuf_render_get_vertex_info;
nv04_render->base.allocate_vertices = nv04_vbuf_render_allocate_vertices;
+ nv04_render->base.map_vertices = nv04_vbuf_render_map_vertices;
+ nv04_render->base.unmap_vertices = nv04_vbuf_render_unmap_vertices;
nv04_render->base.set_primitive = nv04_vbuf_render_set_primitive;
nv04_render->base.draw = nv04_vbuf_render_draw;
nv04_render->base.release_vertices = nv04_vbuf_render_release_vertices;
diff --git a/src/gallium/drivers/nv04/nv04_screen.c b/src/gallium/drivers/nv04/nv04_screen.c
index 9ef38bc244c..f9f6d974264 100644
--- a/src/gallium/drivers/nv04/nv04_screen.c
+++ b/src/gallium/drivers/nv04/nv04_screen.c
@@ -119,28 +119,6 @@ nv04_screen_is_format_supported(struct pipe_screen *screen,
return FALSE;
}
-static void *
-nv04_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
- unsigned flags )
-{
- void *map;
- struct nv04_miptree *nv04mt = (struct nv04_miptree *)surface->texture;
-
- map = pipe_buffer_map(screen, nv04mt->buffer, flags);
- if (!map)
- return NULL;
-
- return map + surface->offset;
-}
-
-static void
-nv04_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
-{
- struct nv04_miptree *nv04mt = (struct nv04_miptree *)surface->texture;
-
- pipe_buffer_unmap(screen, nv04mt->buffer);
-}
-
static void
nv04_screen_destroy(struct pipe_screen *pscreen)
{
@@ -226,10 +204,8 @@ nv04_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
screen->pipe.is_format_supported = nv04_screen_is_format_supported;
- screen->pipe.surface_map = nv04_surface_map;
- screen->pipe.surface_unmap = nv04_surface_unmap;
-
nv04_screen_init_miptree_functions(&screen->pipe);
+ nv04_screen_init_transfer_functions(&screen->pipe);
u_simple_screen_init(&screen->pipe);
return &screen->pipe;
diff --git a/src/gallium/drivers/nv04/nv04_screen.h b/src/gallium/drivers/nv04/nv04_screen.h
index 540aec907bf..ee6fb6db44a 100644
--- a/src/gallium/drivers/nv04/nv04_screen.h
+++ b/src/gallium/drivers/nv04/nv04_screen.h
@@ -24,4 +24,7 @@ nv04_screen(struct pipe_screen *screen)
return (struct nv04_screen *)screen;
}
+void
+nv04_screen_init_transfer_functions(struct pipe_screen *pscreen);
+
#endif
diff --git a/src/gallium/drivers/nv04/nv04_state.h b/src/gallium/drivers/nv04/nv04_state.h
index 15d4685ec1a..0d51439e3ff 100644
--- a/src/gallium/drivers/nv04/nv04_state.h
+++ b/src/gallium/drivers/nv04/nv04_state.h
@@ -35,9 +35,6 @@ struct nv04_miptree {
struct pipe_buffer *buffer;
uint total_size;
- struct pipe_texture *shadow_tex;
- struct pipe_surface *shadow_surface;
-
struct {
uint pitch;
uint image_offset;
diff --git a/src/gallium/drivers/nv04/nv04_state_emit.c b/src/gallium/drivers/nv04/nv04_state_emit.c
index bd8ef1adbff..eb2c1c57c67 100644
--- a/src/gallium/drivers/nv04/nv04_state_emit.c
+++ b/src/gallium/drivers/nv04/nv04_state_emit.c
@@ -93,7 +93,7 @@ static void nv04_emit_sampler(struct nv04_context *nv04, int unit)
static void nv04_state_emit_framebuffer(struct nv04_context* nv04)
{
struct pipe_framebuffer_state* fb = nv04->framebuffer;
- struct pipe_surface *rt, *zeta;
+ struct nv04_surface *rt, *zeta;
uint32_t rt_format, w, h;
int colour_format = 0, zeta_format = 0;
struct nv04_miptree *nv04mt = 0;
@@ -101,7 +101,7 @@ static void nv04_state_emit_framebuffer(struct nv04_context* nv04)
w = fb->cbufs[0]->width;
h = fb->cbufs[0]->height;
colour_format = fb->cbufs[0]->format;
- rt = fb->cbufs[0];
+ rt = (struct nv04_surface *)fb->cbufs[0];
if (fb->zsbuf) {
if (colour_format) {
@@ -113,7 +113,7 @@ static void nv04_state_emit_framebuffer(struct nv04_context* nv04)
}
zeta_format = fb->zsbuf->format;
- zeta = fb->zsbuf;
+ zeta = (struct nv04_surface *)fb->zsbuf;
}
switch (colour_format) {
@@ -131,13 +131,13 @@ static void nv04_state_emit_framebuffer(struct nv04_context* nv04)
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_FORMAT, 1);
OUT_RING(rt_format);
- nv04mt = (struct nv04_miptree *)rt->texture;
+ nv04mt = (struct nv04_miptree *)rt->base.texture;
/* FIXME pitches have to be aligned ! */
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2);
- OUT_RING(rt->stride|(zeta->stride<<16));
+ OUT_RING(rt->pitch|(zeta->pitch<<16));
OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
if (fb->zsbuf) {
- nv04mt = (struct nv04_miptree *)zeta->texture;
+ nv04mt = (struct nv04_miptree *)zeta->base.texture;
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1);
OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
}
@@ -202,8 +202,11 @@ nv04_emit_hw_state(struct nv04_context *nv04)
*/
/* Render target */
+ unsigned rt_pitch = ((struct nv04_surface *)nv04->rt)->pitch;
+ unsigned zeta_pitch = ((struct nv04_surface *)nv04->zeta)->pitch;
+
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2);
- OUT_RING(nv04->rt->stride|(nv04->zeta->stride<<16));
+ OUT_RING(rt_pitch|(zeta_pitch<<16));
OUT_RELOCl(nv04->rt, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
if (nv04->zeta) {
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1);
diff --git a/src/gallium/drivers/nv04/nv04_surface.c b/src/gallium/drivers/nv04/nv04_surface.c
index 14abf166798..0387ff4e78b 100644
--- a/src/gallium/drivers/nv04/nv04_surface.c
+++ b/src/gallium/drivers/nv04/nv04_surface.c
@@ -33,7 +33,7 @@
#include "util/u_tile.h"
static void
-nv04_surface_copy(struct pipe_context *pipe, boolean do_flip,
+nv04_surface_copy(struct pipe_context *pipe,
struct pipe_surface *dest, unsigned destx, unsigned desty,
struct pipe_surface *src, unsigned srcx, unsigned srcy,
unsigned width, unsigned height)
@@ -41,15 +41,6 @@ nv04_surface_copy(struct pipe_context *pipe, boolean do_flip,
struct nv04_context *nv04 = nv04_context(pipe);
struct nv04_surface_2d *eng2d = nv04->screen->eng2d;
- if (do_flip) {
- desty += height;
- while (height--) {
- eng2d->copy(eng2d, dest, destx, desty--, src,
- srcx, srcy++, width, 1);
- }
- return;
- }
-
eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height);
}
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c b/src/gallium/drivers/nv04/nv04_surface_2d.c
index 230cfd17dd9..f3a8d7efeed 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -101,6 +101,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
struct nouveau_grobj *sifm = ctx->sifm;
struct nouveau_bo *src_bo = ctx->nvws->get_bo(ctx->buf(src));
struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
+ const unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
const unsigned max_w = 1024;
const unsigned max_h = 1024;
const unsigned sub_w = w > max_w ? max_w : w;
@@ -110,6 +111,8 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
/* POT or GTFO */
assert(!(w & (w - 1)) && !(h & (h - 1)));
+ /* That's the way she likes it */
+ assert(src_pitch == ((struct nv04_surface *)dst)->pitch);
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1);
OUT_RELOCo(chan, dst_bo,
@@ -130,7 +133,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
for (cx = 0; cx < w; cx += sub_w) {
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(cx, cy) *
- dst->block.size, NOUVEAU_BO_GART |
+ dst->texture->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9);
@@ -146,11 +149,11 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SIZE, 4);
OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, src->stride |
+ OUT_RING (chan, src_pitch |
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER |
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
- OUT_RELOCl(chan, src_bo, src->offset + cy * src->stride +
- cx * src->block.size, NOUVEAU_BO_GART |
+ OUT_RELOCl(chan, src_bo, src->offset + cy * src_pitch +
+ cx * src->texture->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RING (chan, 0);
}
@@ -168,10 +171,12 @@ nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx,
struct nouveau_grobj *m2mf = ctx->m2mf;
struct nouveau_bo *src_bo = ctx->nvws->get_bo(ctx->buf(src));
struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
- unsigned dst_offset, src_offset;
-
- dst_offset = dst->offset + (dy * dst->stride) + (dx * dst->block.size);
- src_offset = src->offset + (sy * src->stride) + (sx * src->block.size);
+ unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
+ unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
+ unsigned dst_offset = dst->offset + dy * dst_pitch +
+ dx * dst->texture->block.size;
+ unsigned src_offset = src->offset + sy * src_pitch +
+ sx * src->texture->block.size;
WAIT_RING (chan, 3 + ((h / 2047) + 1) * 9);
BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2);
@@ -188,16 +193,16 @@ nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx,
NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
OUT_RELOCl(chan, dst_bo, dst_offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR);
- OUT_RING (chan, src->stride);
- OUT_RING (chan, dst->stride);
- OUT_RING (chan, w * src->block.size);
+ OUT_RING (chan, src_pitch);
+ OUT_RING (chan, dst_pitch);
+ OUT_RING (chan, w * src->texture->block.size);
OUT_RING (chan, count);
OUT_RING (chan, 0x0101);
OUT_RING (chan, 0);
h -= count;
- src_offset += src->stride * count;
- dst_offset += dst->stride * count;
+ src_offset += src_pitch * count;
+ dst_offset += dst_pitch * count;
}
return 0;
@@ -213,6 +218,8 @@ nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
struct nouveau_grobj *blit = ctx->blit;
struct nouveau_bo *src_bo = ctx->nvws->get_bo(ctx->buf(src));
struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
+ unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
+ unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
int format;
format = nv04_surface_format(dst->format);
@@ -225,7 +232,7 @@ nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4);
OUT_RING (chan, format);
- OUT_RING (chan, (dst->stride << 16) | src->stride);
+ OUT_RING (chan, (dst_pitch << 16) | src_pitch);
OUT_RELOCl(chan, src_bo, src->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
@@ -242,6 +249,8 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
int dx, int dy, struct pipe_surface *src, int sx, int sy,
int w, int h)
{
+ unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
+ unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
int src_linear = src->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR;
int dst_linear = dst->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR;
@@ -257,7 +266,8 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
* to NV_MEMORY_TO_MEMORY_FORMAT in this case.
*/
if ((src->offset & 63) || (dst->offset & 63) ||
- (src->stride & 63) || (dst->stride & 63)) {
+ (src_pitch & 63) || (dst_pitch & 63) ||
+ debug_get_bool_option("NOUVEAU_NO_COPYBLIT", FALSE)) {
nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h);
return;
}
@@ -273,6 +283,7 @@ nv04_surface_fill(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
struct nouveau_grobj *surf2d = ctx->surf2d;
struct nouveau_grobj *rect = ctx->rect;
struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
+ unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
int cs2d_format, gdirect_format;
cs2d_format = nv04_surface_format(dst->format);
@@ -287,7 +298,7 @@ nv04_surface_fill(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
OUT_RELOCo(chan, dst_bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4);
OUT_RING (chan, cs2d_format);
- OUT_RING (chan, (dst->stride << 16) | dst->stride);
+ OUT_RING (chan, (dst_pitch << 16) | dst_pitch);
OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
OUT_RELOCl(chan, dst_bo, dst->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
@@ -426,13 +437,21 @@ nv04_surface_2d_init(struct nouveau_winsys *nvws)
return NULL;
}
- if (chan->device->chipset < 0x10) {
- class = NV04_SCALED_IMAGE_FROM_MEMORY;
- } else
- if (chan->device->chipset < 0x40) {
+ switch (chan->device->chipset & 0xf0) {
+ case 0x10:
+ case 0x20:
class = NV10_SCALED_IMAGE_FROM_MEMORY;
- } else {
+ break;
+ case 0x30:
+ class = NV30_SCALED_IMAGE_FROM_MEMORY;
+ break;
+ case 0x40:
+ case 0x60:
class = NV40_SCALED_IMAGE_FROM_MEMORY;
+ break;
+ default:
+ class = NV04_SCALED_IMAGE_FROM_MEMORY;
+ break;
}
ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->sifm);
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.h b/src/gallium/drivers/nv04/nv04_surface_2d.h
index 21b8f869606..82ce7189c8b 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.h
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.h
@@ -1,6 +1,11 @@
#ifndef __NV04_SURFACE_2D_H__
#define __NV04_SURFACE_2D_H__
+struct nv04_surface {
+ struct pipe_surface base;
+ unsigned pitch;
+};
+
struct nv04_surface_2d {
struct nouveau_winsys *nvws;
struct nouveau_notifier *ntfy;
diff --git a/src/gallium/drivers/nv04/nv04_transfer.c b/src/gallium/drivers/nv04/nv04_transfer.c
new file mode 100644
index 00000000000..e925a44e298
--- /dev/null
+++ b/src/gallium/drivers/nv04/nv04_transfer.c
@@ -0,0 +1,196 @@
+#include <pipe/p_state.h>
+#include <pipe/p_defines.h>
+#include <pipe/p_inlines.h>
+#include <util/u_memory.h>
+#include <nouveau/nouveau_winsys.h>
+#include "nv04_context.h"
+#include "nv04_screen.h"
+#include "nv04_state.h"
+
+struct nv04_transfer {
+ struct pipe_transfer base;
+ struct pipe_surface *surface;
+ bool direct;
+};
+
+static unsigned nv04_usage_tx_to_buf(unsigned tx_usage)
+{
+ switch (tx_usage) {
+ case PIPE_TRANSFER_READ:
+ return PIPE_BUFFER_USAGE_CPU_READ;
+ case PIPE_TRANSFER_WRITE:
+ return PIPE_BUFFER_USAGE_CPU_WRITE;
+ case PIPE_TRANSFER_READ_WRITE:
+ return PIPE_BUFFER_USAGE_CPU_READ_WRITE;
+ default:
+ assert(0);
+ }
+
+ return -1;
+}
+
+static void
+nv04_compatible_transfer_tex(struct pipe_texture *pt, unsigned level,
+ struct pipe_texture *template)
+{
+ memset(template, 0, sizeof(struct pipe_texture));
+ template->target = pt->target;
+ template->format = pt->format;
+ template->width[0] = pt->width[level];
+ template->height[0] = pt->height[level];
+ template->depth[0] = 1;
+ template->block = pt->block;
+ template->nblocksx[0] = pt->nblocksx[level];
+ template->nblocksy[0] = pt->nblocksx[level];
+ template->last_level = 0;
+ template->compressed = pt->compressed;
+ template->nr_samples = pt->nr_samples;
+
+ template->tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC |
+ NOUVEAU_TEXTURE_USAGE_LINEAR;
+}
+
+static struct pipe_transfer *
+nv04_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
+ unsigned face, unsigned level, unsigned zslice,
+ enum pipe_transfer_usage usage,
+ unsigned x, unsigned y, unsigned w, unsigned h)
+{
+ struct nv04_miptree *mt = (struct nv04_miptree *)pt;
+ struct nv04_transfer *tx;
+ struct pipe_texture tx_tex_template, *tx_tex;
+
+ tx = CALLOC_STRUCT(nv04_transfer);
+ if (!tx)
+ return NULL;
+
+ pipe_texture_reference(&tx->base.texture, pt);
+ tx->base.format = pt->format;
+ tx->base.x = x;
+ tx->base.y = y;
+ tx->base.width = w;
+ tx->base.height = h;
+ tx->base.block = pt->block;
+ tx->base.nblocksx = pt->nblocksx[level];
+ tx->base.nblocksy = pt->nblocksy[level];
+ tx->base.stride = mt->level[level].pitch;
+ tx->base.usage = usage;
+ tx->base.face = face;
+ tx->base.level = level;
+ tx->base.zslice = zslice;
+
+ /* Direct access to texture */
+ if ((pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC ||
+ debug_get_bool_option("NOUVEAU_NO_TRANSFER", TRUE/*XXX:FALSE*/)) &&
+ pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)
+ {
+ tx->direct = true;
+ tx->surface = pscreen->get_tex_surface(pscreen, pt,
+ 0, 0, 0,
+ nv04_usage_tx_to_buf(usage));
+ return &tx->base;
+ }
+
+ tx->direct = false;
+
+ nv04_compatible_transfer_tex(pt, level, &tx_tex_template);
+
+ tx_tex = pscreen->texture_create(pscreen, &tx_tex_template);
+ if (!tx_tex)
+ {
+ FREE(tx);
+ return NULL;
+ }
+
+ tx->surface = pscreen->get_tex_surface(pscreen, tx_tex,
+ face, level, zslice,
+ nv04_usage_tx_to_buf(usage));
+
+ pipe_texture_reference(&tx_tex, NULL);
+
+ if (!tx->surface)
+ {
+ pipe_surface_reference(&tx->surface, NULL);
+ FREE(tx);
+ return NULL;
+ }
+
+ if (usage != PIPE_TRANSFER_WRITE) {
+ struct nv04_screen *nvscreen = nv04_screen(pscreen);
+ struct pipe_surface *src;
+
+ src = pscreen->get_tex_surface(pscreen, pt,
+ face, level, zslice,
+ PIPE_BUFFER_USAGE_GPU_READ);
+
+ /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */
+ /* TODO: Check if SIFM can un-swizzle */
+ nvscreen->eng2d->copy(nvscreen->eng2d,
+ tx->surface, 0, 0,
+ src, 0, 0,
+ src->width, src->height);
+
+ pipe_surface_reference(&src, NULL);
+ }
+
+ return &tx->base;
+}
+
+static void
+nv04_transfer_del(struct pipe_transfer *ptx)
+{
+ struct nv04_transfer *tx = (struct nv04_transfer *)ptx;
+
+ if (!tx->direct && ptx->usage != PIPE_TRANSFER_READ) {
+ struct pipe_screen *pscreen = ptx->texture->screen;
+ struct nv04_screen *nvscreen = nv04_screen(pscreen);
+ struct pipe_surface *dst;
+
+ dst = pscreen->get_tex_surface(pscreen, ptx->texture,
+ ptx->face, ptx->level, ptx->zslice,
+ PIPE_BUFFER_USAGE_GPU_WRITE);
+
+ /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */
+ nvscreen->eng2d->copy(nvscreen->eng2d,
+ dst, 0, 0,
+ tx->surface, 0, 0,
+ dst->width, dst->height);
+
+ pipe_surface_reference(&dst, NULL);
+ }
+
+ pipe_surface_reference(&tx->surface, NULL);
+ pipe_texture_reference(&ptx->texture, NULL);
+ FREE(ptx);
+}
+
+static void *
+nv04_transfer_map(struct pipe_screen *pscreen, struct pipe_transfer *ptx)
+{
+ struct nv04_transfer *tx = (struct nv04_transfer *)ptx;
+ struct nv04_surface *ns = (struct nv04_surface *)tx->surface;
+ struct nv04_miptree *mt = (struct nv04_miptree *)tx->surface->texture;
+ void *map = pipe_buffer_map(pscreen, mt->buffer,
+ nv04_usage_tx_to_buf(ptx->usage));
+
+ return map + ns->base.offset +
+ ptx->y * ns->pitch + ptx->x * ptx->block.size;
+}
+
+static void
+nv04_transfer_unmap(struct pipe_screen *pscreen, struct pipe_transfer *ptx)
+{
+ struct nv04_transfer *tx = (struct nv04_transfer *)ptx;
+ struct nv04_miptree *mt = (struct nv04_miptree *)tx->surface->texture;
+
+ pipe_buffer_unmap(pscreen, mt->buffer);
+}
+
+void
+nv04_screen_init_transfer_functions(struct pipe_screen *pscreen)
+{
+ pscreen->get_tex_transfer = nv04_transfer_new;
+ pscreen->tex_transfer_destroy = nv04_transfer_del;
+ pscreen->transfer_map = nv04_transfer_map;
+ pscreen->transfer_unmap = nv04_transfer_unmap;
+}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 23:32:37 +0000