diff options
Diffstat (limited to 'src/gallium/drivers/ilo/ilo_screen.c')
| -rw-r--r-- | src/gallium/drivers/ilo/ilo_screen.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/gallium/drivers/ilo/ilo_screen.c b/src/gallium/drivers/ilo/ilo_screen.c index 5d652e4ad73..442e704615d 100644 --- a/src/gallium/drivers/ilo/ilo_screen.c +++ b/src/gallium/drivers/ilo/ilo_screen.c @@ -652,6 +652,7 @@ init_dev(struct ilo_dev_info *dev, const struct intel_winsys_info *info) dev->has_llc = info->has_llc; dev->has_address_swizzling = info->has_address_swizzling; dev->has_logical_context = info->has_logical_context; + dev->has_ppgtt = info->has_ppgtt; dev->has_timestamp = info->has_timestamp; dev->has_gen7_sol_reset = info->has_gen7_sol_reset; @@ -661,6 +662,24 @@ init_dev(struct ilo_dev_info *dev, const struct intel_winsys_info *info) } /* + * PIPE_CONTROL and MI_* use PPGTT writes on GEN7+ and privileged GGTT + * writes on GEN6. + * + * From the Sandy Bridge PRM, volume 1 part 3, page 101: + * + * "[DevSNB] When Per-Process GTT Enable is set, it is assumed that all + * code is in a secure environment, independent of address space. + * Under this condition, this bit only specifies the address space + * (GGTT or PPGTT). All commands are executed "as-is"" + * + * We need PPGTT to be enabled on GEN6 too. + */ + if (!dev->has_ppgtt) { + /* experiments show that it does not really matter... */ + ilo_warn("PPGTT disabled\n"); + } + + /* * From the Sandy Bridge PRM, volume 4 part 2, page 18: * * "[DevSNB]: The GT1 product's URB provides 32KB of storage, arranged |