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-rw-r--r--src/gallium/drivers/i915/i915_reg.h2
-rw-r--r--src/gallium/drivers/i915/i915_resource.h6
-rw-r--r--src/gallium/drivers/i915/i915_resource_texture.c9
-rw-r--r--src/gallium/drivers/i915/i915_screen.c17
-rw-r--r--src/gallium/drivers/i915/i915_state_emit.c8
-rw-r--r--src/gallium/drivers/i915/i915_state_sampler.c5
6 files changed, 22 insertions, 25 deletions
diff --git a/src/gallium/drivers/i915/i915_reg.h b/src/gallium/drivers/i915/i915_reg.h
index 04620fec681..cc28891e4ac 100644
--- a/src/gallium/drivers/i915/i915_reg.h
+++ b/src/gallium/drivers/i915/i915_reg.h
@@ -973,6 +973,8 @@
#define PCI_CHIP_G33_G 0x29C2
#define PCI_CHIP_Q35_G 0x29B2
#define PCI_CHIP_Q33_G 0x29D2
+#define PCI_CHIP_PINEVIEW_G 0xA001
+#define PCI_CHIP_PINEVIEW_M 0xA011
#endif
diff --git a/src/gallium/drivers/i915/i915_resource.h b/src/gallium/drivers/i915/i915_resource.h
index 1093e8f41f9..753bd266b12 100644
--- a/src/gallium/drivers/i915/i915_resource.h
+++ b/src/gallium/drivers/i915/i915_resource.h
@@ -32,6 +32,7 @@ struct i915_screen;
#include "util/u_transfer.h"
#include "util/u_debug.h"
+#include "i915_winsys.h"
struct i915_context;
@@ -52,13 +53,12 @@ struct i915_buffer {
struct i915_texture {
struct u_resource b;
+ /* tiling flags */
+ enum i915_winsys_buffer_tile tiling;
unsigned stride;
unsigned depth_stride; /* per-image on i945? */
unsigned total_nblocksy;
- unsigned sw_tiled; /**< tiled with software flags */
- unsigned hw_tiled; /**< tiled with hardware fences */
-
unsigned nr_images[I915_MAX_TEXTURE_2D_LEVELS];
/* Explicitly store the offset of each image for each cube face or
diff --git a/src/gallium/drivers/i915/i915_resource_texture.c b/src/gallium/drivers/i915/i915_resource_texture.c
index c5c6179b169..d45346b32ad 100644
--- a/src/gallium/drivers/i915/i915_resource_texture.c
+++ b/src/gallium/drivers/i915/i915_resource_texture.c
@@ -165,7 +165,7 @@ i9x5_scanout_layout(struct i915_texture *tex)
if (pt->width0 >= 240) {
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
- tex->hw_tiled = I915_TILE_X;
+ tex->tiling = I915_TILE_X;
} else if (pt->width0 == 64 && pt->height0 == 64) {
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
@@ -202,7 +202,7 @@ i9x5_display_target_layout(struct i915_texture *tex)
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
- tex->hw_tiled = I915_TILE_X;
+ tex->tiling = I915_TILE_X;
#if DEBUG_TEXTURE
debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
@@ -790,9 +790,8 @@ i915_texture_create(struct pipe_screen *screen,
goto fail;
/* setup any hw fences */
- if (tex->hw_tiled) {
- assert(tex->sw_tiled == I915_TILE_NONE);
- iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->hw_tiled);
+ if (tex->tiling) {
+ iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->tiling);
}
diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c
index a3e7c5c5772..07183253649 100644
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -83,6 +83,12 @@ i915_get_name(struct pipe_screen *screen)
case PCI_CHIP_Q33_G:
chipset = "Q33";
break;
+ case PCI_CHIP_PINEVIEW_G:
+ chipset = "Pineview G";
+ break;
+ case PCI_CHIP_PINEVIEW_M:
+ chipset = "Pineview M";
+ break;
default:
chipset = "unknown";
break;
@@ -178,6 +184,11 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
return 0;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 0;
+ case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
+ case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
+ case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
+ case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
+ return 1;
default:
assert(0);
return 0;
@@ -220,10 +231,6 @@ i915_is_format_supported(struct pipe_screen *screen,
static const enum pipe_format tex_supported[] = {
PIPE_FORMAT_B8G8R8A8_UNORM,
PIPE_FORMAT_B8G8R8X8_UNORM,
- PIPE_FORMAT_R8G8B8A8_UNORM,
-#if 0
- PIPE_FORMAT_R8G8B8X8_UNORM,
-#endif
PIPE_FORMAT_B5G6R5_UNORM,
PIPE_FORMAT_L8_UNORM,
PIPE_FORMAT_A8_UNORM,
@@ -346,6 +353,8 @@ i915_screen_create(struct i915_winsys *iws)
case PCI_CHIP_G33_G:
case PCI_CHIP_Q33_G:
case PCI_CHIP_Q35_G:
+ case PCI_CHIP_PINEVIEW_G:
+ case PCI_CHIP_PINEVIEW_M:
is->is_i945 = TRUE;
break;
diff --git a/src/gallium/drivers/i915/i915_state_emit.c b/src/gallium/drivers/i915/i915_state_emit.c
index bd059d5716c..49dff1f775c 100644
--- a/src/gallium/drivers/i915/i915_state_emit.c
+++ b/src/gallium/drivers/i915/i915_state_emit.c
@@ -224,10 +224,6 @@ i915_emit_hardware_state(struct i915_context *i915 )
struct i915_texture *tex = i915_texture(cbuf_surface->texture);
assert(tex);
- if (tex && tex->sw_tiled) {
- ctile = BUF_3D_TILED_SURFACE;
- }
-
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
OUT_BATCH(BUF_3D_ID_COLOR_BACK |
@@ -246,10 +242,6 @@ i915_emit_hardware_state(struct i915_context *i915 )
struct i915_texture *tex = i915_texture(depth_surface->texture);
assert(tex);
- if (tex && tex->sw_tiled) {
- ztile = BUF_3D_TILED_SURFACE;
- }
-
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
assert(tex);
diff --git a/src/gallium/drivers/i915/i915_state_sampler.c b/src/gallium/drivers/i915/i915_state_sampler.c
index 4667e0b78d4..9771274ca11 100644
--- a/src/gallium/drivers/i915/i915_state_sampler.c
+++ b/src/gallium/drivers/i915/i915_state_sampler.c
@@ -267,11 +267,6 @@ static void update_map(struct i915_context *i915,
assert(format);
assert(pitch);
- if (tex->sw_tiled) {
- assert(!((pitch - 1) & pitch));
- tiled = MS3_TILED_SURFACE;
- }
-
/* MS3 state */
state[0] =
(((height - 1) << MS3_HEIGHT_SHIFT)
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 23:33:22 +0000