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-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_draw.c9
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_cache.c4
2 files changed, 8 insertions, 5 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index adbdef24a4d..9ed79cbcb7f 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -186,6 +186,10 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
fd6_ctx->prog = fd6_emit_get_prog(&emit);
}
+ /* bail if compile failed: */
+ if (!fd6_ctx->prog)
+ return NULL;
+
emit.dirty = ctx->dirty; /* *after* fixup_shader_state() */
emit.bs = fd6_emit_get_prog(&emit)->bs;
emit.vs = fd6_emit_get_prog(&emit)->vs;
@@ -194,11 +198,6 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct ir3_shader_variant *vp = emit.vs;
const struct ir3_shader_variant *fp = emit.fs;
- /* do regular pass first, since that is more likely to fail compiling: */
-
- if (!vp || !fp)
- return false;
-
ctx->stats.vs_regs += ir3_shader_halfregs(vp);
ctx->stats.fs_regs += ir3_shader_halfregs(fp);
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cache.c b/src/gallium/drivers/freedreno/ir3/ir3_cache.c
index 2de23e49873..8e7070a727d 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_cache.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_cache.c
@@ -97,6 +97,10 @@ ir3_cache_lookup(struct ir3_cache *cache, const struct ir3_cache_key *key,
struct ir3_shader_variant *vs = ir3_shader_variant(key->vs, key->key, false, debug);
struct ir3_shader_variant *fs = ir3_shader_variant(key->fs, key->key, false, debug);
+ if (!bs || !vs || !fs) {
+ return NULL;
+ }
+
struct ir3_program_state *state =
cache->funcs->create_state(cache->data, bs, vs, fs, &key->key);
state->key = *key;