diff options
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_zsa.c')
| -rw-r--r-- | src/gallium/drivers/freedreno/freedreno_zsa.c | 144 |
1 files changed, 144 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_zsa.c b/src/gallium/drivers/freedreno/freedreno_zsa.c new file mode 100644 index 00000000000..e8daa37a358 --- /dev/null +++ b/src/gallium/drivers/freedreno/freedreno_zsa.c @@ -0,0 +1,144 @@ +/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */ + +/* + * Copyright (C) 2012 Rob Clark <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark <[email protected]> + */ + + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" + +#include "freedreno_zsa.h" +#include "freedreno_context.h" +#include "freedreno_util.h" + +static enum rb_stencil_op +stencil_op(unsigned op) +{ + switch (op) { + case PIPE_STENCIL_OP_KEEP: + return STENCIL_KEEP; + case PIPE_STENCIL_OP_ZERO: + return STENCIL_ZERO; + case PIPE_STENCIL_OP_REPLACE: + return STENCIL_REPLACE; + case PIPE_STENCIL_OP_INCR: + return STENCIL_INCR_CLAMP; + case PIPE_STENCIL_OP_DECR: + return STENCIL_DECR_CLAMP; + case PIPE_STENCIL_OP_INCR_WRAP: + return STENCIL_INCR_WRAP; + case PIPE_STENCIL_OP_DECR_WRAP: + return STENCIL_DECR_WRAP; + case PIPE_STENCIL_OP_INVERT: + return STENCIL_INVERT; + default: + DBG("invalid stencil op: %u", op); + return 0; + } +} + +static void * +fd_zsa_state_create(struct pipe_context *pctx, + const struct pipe_depth_stencil_alpha_state *cso) +{ + struct fd_zsa_stateobj *so; + + so = CALLOC_STRUCT(fd_zsa_stateobj); + if (!so) + return NULL; + + so->base = *cso; + + so->rb_depthcontrol |= + RB_DEPTHCONTROL_ZFUNC(cso->depth.func); /* maps 1:1 */ + + if (cso->depth.enabled) + so->rb_depthcontrol |= RB_DEPTHCONTROL_Z_ENABLE; + if (cso->depth.writemask) + so->rb_depthcontrol |= RB_DEPTHCONTROL_Z_WRITE_ENABLE; + + if (cso->stencil[0].enabled) { + const struct pipe_stencil_state *s = &cso->stencil[0]; + + so->rb_depthcontrol |= + RB_DEPTHCONTROL_STENCIL_ENABLE | + RB_DEPTHCONTROL_STENCILFUNC(s->func) | /* maps 1:1 */ + RB_DEPTHCONTROL_STENCILFAIL(stencil_op(s->fail_op)) | + RB_DEPTHCONTROL_STENCILZPASS(stencil_op(s->zpass_op)) | + RB_DEPTHCONTROL_STENCILZFAIL(stencil_op(s->zfail_op)); + so->rb_stencilrefmask |= + 0xff000000 | /* ??? */ + RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) | + RB_STENCILREFMASK_STENCILMASK(s->valuemask); + + if (cso->stencil[1].enabled) { + const struct pipe_stencil_state *bs = &cso->stencil[1]; + + so->rb_depthcontrol |= + RB_DEPTHCONTROL_BACKFACE_ENABLE | + RB_DEPTHCONTROL_STENCILFUNC_BF(bs->func) | /* maps 1:1 */ + RB_DEPTHCONTROL_STENCILFAIL_BF(stencil_op(bs->fail_op)) | + RB_DEPTHCONTROL_STENCILZPASS_BF(stencil_op(bs->zpass_op)) | + RB_DEPTHCONTROL_STENCILZFAIL_BF(stencil_op(bs->zfail_op)); + so->rb_stencilrefmask_bf |= + 0xff000000 | /* ??? */ + RB_STENCILREFMASK_STENCILWRITEMASK(bs->writemask) | + RB_STENCILREFMASK_STENCILMASK(bs->valuemask); + } + } + + if (cso->alpha.enabled) { + so->rb_colorcontrol = + RB_COLORCONTROL_ALPHA_FUNC(cso->alpha.func) | + RB_COLORCONTROL_ALPHA_TEST_ENABLE; + so->rb_alpha_ref = f2d(cso->alpha.ref_value); + } + + return so; +} + +static void +fd_zsa_state_bind(struct pipe_context *pctx, void *hwcso) +{ + struct fd_context *ctx = fd_context(pctx); + ctx->zsa = hwcso; + ctx->dirty |= FD_DIRTY_ZSA; +} + +static void +fd_zsa_state_delete(struct pipe_context *pctx, void *hwcso) +{ + FREE(hwcso); +} + +void +fd_zsa_init(struct pipe_context *pctx) +{ + pctx->create_depth_stencil_alpha_state = fd_zsa_state_create; + pctx->bind_depth_stencil_alpha_state = fd_zsa_state_bind; + pctx->delete_depth_stencil_alpha_state = fd_zsa_state_delete; +} |