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-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_draw.c8
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_emit.c8
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_emit.h2
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_gmem.c7
4 files changed, 12 insertions, 13 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index 67239414393..0593b253f1a 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -169,14 +169,14 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
emit.key.binning_pass = false;
emit.dirty = dirty;
- draw_impl(ctx, ctx->ring, &emit);
+ draw_impl(ctx, ctx->batch->draw, &emit);
/* and now binning pass: */
emit.key.binning_pass = true;
emit.dirty = dirty & ~(FD_DIRTY_BLEND);
emit.vp = NULL; /* we changed key so need to refetch vp */
emit.fp = NULL;
- draw_impl(ctx, ctx->binning_ring, &emit);
+ draw_impl(ctx, ctx->batch->binning, &emit);
return true;
}
@@ -209,7 +209,7 @@ static void
fd3_clear_binning(struct fd_context *ctx, unsigned dirty)
{
struct fd3_context *fd3_ctx = fd3_context(ctx);
- struct fd_ringbuffer *ring = ctx->binning_ring;
+ struct fd_ringbuffer *ring = ctx->batch->binning;
struct fd3_emit emit = {
.debug = &ctx->debug,
.vtx = &fd3_ctx->solid_vbuf_state,
@@ -250,7 +250,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
{
struct fd3_context *fd3_ctx = fd3_context(ctx);
struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
- struct fd_ringbuffer *ring = ctx->ring;
+ struct fd_ringbuffer *ring = ctx->batch->draw;
unsigned dirty = ctx->dirty;
unsigned i;
struct fd3_emit emit = {
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 03b9328b605..45185edb505 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -756,10 +756,9 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
* state, there could have been a context switch between ioctls):
*/
void
-fd3_emit_restore(struct fd_context *ctx)
+fd3_emit_restore(struct fd_context *ctx, struct fd_ringbuffer *ring)
{
struct fd3_context *fd3_ctx = fd3_context(ctx);
- struct fd_ringbuffer *ring = ctx->ring;
int i;
if (ctx->screen->gpu_id == 320) {
@@ -900,10 +899,9 @@ fd3_emit_restore(struct fd_context *ctx)
}
static void
-fd3_emit_ib(struct fd_ringbuffer *ring, struct fd_ringmarker *start,
- struct fd_ringmarker *end)
+fd3_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
{
- __OUT_IB(ring, true, start, end);
+ __OUT_IB(ring, true, target);
}
void
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
index 17e1fef882f..110f30e89be 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
@@ -93,7 +93,7 @@ void fd3_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd3_emit *emit);
void fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
struct fd3_emit *emit);
-void fd3_emit_restore(struct fd_context *ctx);
+void fd3_emit_restore(struct fd_context *ctx, struct fd_ringbuffer *ring);
void fd3_emit_init(struct pipe_context *pctx);
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 7b96d5eaee2..2449a84c721 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -732,7 +732,7 @@ fd3_emit_sysmem_prep(struct fd_context *ctx)
pitch = fd_resource(psurf->texture)->slices[psurf->u.tex.level].pitch;
}
- fd3_emit_restore(ctx);
+ fd3_emit_restore(ctx, ring);
OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
@@ -794,6 +794,7 @@ emit_binning_pass(struct fd_context *ctx)
{
struct fd_gmem_stateobj *gmem = &ctx->gmem;
struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
+ struct fd_batch *batch = ctx->batch;
struct fd_ringbuffer *ring = ctx->ring;
int i;
@@ -857,7 +858,7 @@ emit_binning_pass(struct fd_context *ctx)
A3XX_PC_VSTREAM_CONTROL_N(0));
/* emit IB to binning drawcmds: */
- ctx->emit_ib(ring, ctx->binning_start, ctx->binning_end);
+ ctx->emit_ib(ring, batch->binning);
fd_reset_wfi(ctx);
fd_wfi(ctx, ring);
@@ -923,7 +924,7 @@ fd3_emit_tile_init(struct fd_context *ctx)
struct fd_gmem_stateobj *gmem = &ctx->gmem;
uint32_t rb_render_control;
- fd3_emit_restore(ctx);
+ fd3_emit_restore(ctx, ring);
/* note: use gmem->bin_w/h, the bin_w/h parameters may be truncated
* at the right and bottom edge tiles