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-rw-r--r--src/gallium/drivers/cell/spu/spu_command.c4
-rw-r--r--src/gallium/drivers/cell/spu/spu_per_fragment_op.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/cell/spu/spu_command.c b/src/gallium/drivers/cell/spu/spu_command.c
index 79f1fb7fb28..f16cabc0270 100644
--- a/src/gallium/drivers/cell/spu/spu_command.c
+++ b/src/gallium/drivers/cell/spu/spu_command.c
@@ -337,8 +337,8 @@ cmd_state_framebuffer(const struct cell_command_framebuffer *cmd)
spu.fb.zsize = 4;
spu.fb.zscale = (float) 0xffffffffu;
break;
- case PIPE_FORMAT_S8Z24_UNORM:
- case PIPE_FORMAT_Z24S8_UNORM:
+ case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
+ case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
case PIPE_FORMAT_X8Z24_UNORM:
case PIPE_FORMAT_Z24X8_UNORM:
spu.fb.zsize = 4;
diff --git a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c
index 2c9e7458afe..3b9566042a1 100644
--- a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c
+++ b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c
@@ -138,13 +138,13 @@ spu_fallback_fragment_ops(uint x, uint y,
if (spu.depth_stencil_alpha.stencil[0].enabled) {
/* do stencil test */
- ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM);
+ ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24_UNORM_S8_USCALED);
}
else if (spu.depth_stencil_alpha.depth.enabled) {
/* do depth test */
- ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM ||
+ ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24_UNORM_S8_USCALED ||
spu.fb.depth_format == PIPE_FORMAT_Z24X8_UNORM);
vector unsigned int ifragZ;