diff options
Diffstat (limited to 'src/gallium/docs/source')
| -rw-r--r-- | src/gallium/docs/source/context.rst | 22 | ||||
| -rw-r--r-- | src/gallium/docs/source/screen.rst | 3 |
2 files changed, 25 insertions, 0 deletions
diff --git a/src/gallium/docs/source/context.rst b/src/gallium/docs/source/context.rst index 1037162aefb..64df0acb645 100644 --- a/src/gallium/docs/source/context.rst +++ b/src/gallium/docs/source/context.rst @@ -520,6 +520,16 @@ invalidates all read caches of the currently-set samplers. +.. _memory_barrier: + +memory_barrier +%%%%%%%%%%%%%%% + +This function flushes caches according to which of the PIPE_BARRIER_* flags +are set. + + + .. _pipe_transfer: PIPE_TRANSFER @@ -557,6 +567,18 @@ These flags control the behavior of a transfer object. Written ranges will be notified later with :ref:`transfer_flush_region`. Cannot be used with ``PIPE_TRANSFER_READ``. +``PIPE_TRANSFER_PERSISTENT`` + Allows the resource to be used for rendering while mapped. + PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating + the resource. + If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER) + must be called to ensure the device can see what the CPU has written. + +``PIPE_TRANSFER_COHERENT`` + If PERSISTENT is set, this ensures any writes done by the device are + immediately visible to the CPU and vice versa. + PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating + the resource. Compute kernel execution ^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index 6b5a195765a..09f809db9c8 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -188,6 +188,9 @@ The integer capabilities: * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather hardware implements the SM5 features, component selection, shadow comparison, and run-time offsets. +* ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether + PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported + for buffers. .. _pipe_capf: |