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-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.c2
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_info.c6
2 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 03f19420986..1099d062dd8 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -4150,7 +4150,7 @@ exec_instruction(
break;
case TGSI_OPCODE_UADD:
- exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
+ exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
break;
case TGSI_OPCODE_UDIV:
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index f289ebcda5a..9c6fdfcd278 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -277,9 +277,9 @@ tgsi_opcode_infer_src_type( uint opcode )
case TGSI_OPCODE_AND:
case TGSI_OPCODE_OR:
case TGSI_OPCODE_XOR:
+ /* XXX some src args may be signed for SAD ? */
case TGSI_OPCODE_SAD:
case TGSI_OPCODE_U2F:
- case TGSI_OPCODE_UADD:
case TGSI_OPCODE_UDIV:
case TGSI_OPCODE_UMOD:
case TGSI_OPCODE_UMAD:
@@ -310,6 +310,8 @@ tgsi_opcode_infer_src_type( uint opcode )
case TGSI_OPCODE_IABS:
case TGSI_OPCODE_ISSG:
case TGSI_OPCODE_UARL:
+ /* UADD is both signed and unsigned require signed for working modifiers */
+ case TGSI_OPCODE_UADD:
return TGSI_TYPE_SIGNED;
default:
return TGSI_TYPE_FLOAT;
@@ -331,7 +333,6 @@ tgsi_opcode_infer_dst_type( uint opcode )
case TGSI_OPCODE_OR:
case TGSI_OPCODE_XOR:
case TGSI_OPCODE_SAD:
- case TGSI_OPCODE_UADD:
case TGSI_OPCODE_UDIV:
case TGSI_OPCODE_UMOD:
case TGSI_OPCODE_UMAD:
@@ -362,6 +363,7 @@ tgsi_opcode_infer_dst_type( uint opcode )
case TGSI_OPCODE_ARR:
case TGSI_OPCODE_IABS:
case TGSI_OPCODE_ISSG:
+ case TGSI_OPCODE_UADD:
return TGSI_TYPE_SIGNED;
default:
return TGSI_TYPE_FLOAT;