mesa.git - Unnamed repository; edit this file 'description' to name the repository.

path: root/src/gallium/Android.common.mk

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/**************************************************************************

Copyright (C) 2004-2005 Nicolai Haehnle et al.

Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.

**************************************************************************/

/* *INDENT-OFF* */

#ifndef _R300_REG_H
#define _R300_REG_H

#define R300_MC_INIT_MISC_LAT_TIMER	0x180
#	define R300_MC_MISC__MC_CPR_INIT_LAT_SHIFT	0
#	define R300_MC_MISC__MC_VF_INIT_LAT_SHIFT	4
#	define R300_MC_MISC__MC_DISP0R_INIT_LAT_SHIFT	8
#	define R300_MC_MISC__MC_DISP1R_INIT_LAT_SHIFT	12
#	define R300_MC_MISC__MC_FIXED_INIT_LAT_SHIFT	16
#	define R300_MC_MISC__MC_E2R_INIT_LAT_SHIFT	20
#	define R300_MC_MISC__MC_SAME_PAGE_PRIO_SHIFT	24
#	define R300_MC_MISC__MC_GLOBW_INIT_LAT_SHIFT	28


#define R300_MC_INIT_GFX_LAT_TIMER	0x154
#	define R300_MC_MISC__MC_G3D0R_INIT_LAT_SHIFT	0
#	define R300_MC_MISC__MC_G3D1R_INIT_LAT_SHIFT	4
#	define R300_MC_MISC__MC_G3D2R_INIT_LAT_SHIFT	8
#	define R300_MC_MISC__MC_G3D3R_INIT_LAT_SHIFT	12
#	define R300_MC_MISC__MC_TX0R_INIT_LAT_SHIFT	16
#	define R300_MC_MISC__MC_TX1R_INIT_LAT_SHIFT	20
#	define R300_MC_MISC__MC_GLOBR_INIT_LAT_SHIFT	24
#	define R300_MC_MISC__MC_GLOBW_FULL_LAT_SHIFT	28

/*
 * This file contains registers and constants for the R300. They have been
 * found mostly by examining command buffers captured using glxtest, as well
 * as by extrapolating some known registers and constants from the R200.
 * I am fairly certain that they are correct unless stated otherwise
 * in comments.
 */

#define R300_SE_VPORT_XSCALE                0x1D98
#define R300_SE_VPORT_XOFFSET               0x1D9C
#define R300_SE_VPORT_YSCALE                0x1DA0
#define R300_SE_VPORT_YOFFSET               0x1DA4
#define R300_SE_VPORT_ZSCALE                0x1DA8
#define R300_SE_VPORT_ZOFFSET               0x1DAC

#define R300_VAP_PORT_IDX0		    0x2040
/*
 * Vertex Array Processing (VAP) Control
 */
#define R300_VAP_CNTL	0x2080
#       define R300_PVS_NUM_SLOTS_SHIFT                 0
#       define R300_PVS_NUM_CNTLRS_SHIFT                4
#       define R300_PVS_NUM_FPUS_SHIFT                  8
#       define R300_VF_MAX_VTX_NUM_SHIFT                18
#       define R300_PVS_NUM_SLOTS(x)                    ((x) << 0)
#       define R300_PVS_NUM_CNTLRS(x)                   ((x) << 4)
#       define R300_PVS_NUM_FPUS(x)                     ((x) << 8)
#       define R300_PVS_VF_MAX_VTX_NUM(x)               ((x) << 18)
#       define R300_GL_CLIP_SPACE_DEF                   (0 << 22)
#       define R300_DX_CLIP_SPACE_DEF                   (1 << 22)
#       define R500_TCL_STATE_OPTIMIZATION              (1 << 23)

/* This register is written directly and also starts data section
 * in many 3d CP_PACKET3's
 */
#define R300_VAP_VF_CNTL	0x2084
#	define	R300_VAP_VF_CNTL__PRIM_TYPE__SHIFT              0
#	define  R300_VAP_VF_CNTL__PRIM_NONE                     (0<<0)
#	define  R300_VAP_VF_CNTL__PRIM_POINTS                   (1<<0)
#	define  R300_VAP_VF_CNTL__PRIM_LINES                    (2<<0)
#	define  R300_VAP_VF_CNTL__PRIM_LINE_STRIP               (3<<0)
#	define  R300_VAP_VF_CNTL__PRIM_TRIANGLES                (4<<0)
#	define  R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN             (5<<0)
#	define  R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP           (6<<0)
#	define  R300_VAP_VF_CNTL__PRIM_LINE_LOOP                (12<<0)
#	define  R300_VAP_VF_CNTL__PRIM_QUADS                    (13<<0)
#	define  R300_VAP_VF_CNTL__PRIM_QUAD_STRIP               (14<<0)
#	define  R300_VAP_VF_CNTL__PRIM_POLYGON                  (15<<0)

#	define	R300_VAP_VF_CNTL__PRIM_WALK__SHIFT              4
	/* State based - direct writes to registers trigger vertex
           generation */
#	define	R300_VAP_VF_CNTL__PRIM_WALK_STATE_BASED         (0<<4)
#	define	R300_VAP_VF_CNTL__PRIM_WALK_INDICES             (1<<4)
#	define	R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST         (2<<4)
#	define	R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED     (3<<4)

	/* I don't think I saw these three used.. */
#	define	R300_VAP_VF_CNTL__COLOR_ORDER__SHIFT            6
#	define	R300_VAP_VF_CNTL__TCL_OUTPUT_CTL_ENA__SHIFT     9
#	define	R300_VAP_VF_CNTL__PROG_STREAM_ENA__SHIFT        10

	/* index size - when not set the indices are assumed to be 16 bit */
#	define	R300_VAP_VF_CNTL__INDEX_SIZE_32bit              (1<<11)
#       define R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS          (1<<14)
	/* number of vertices */
#	define	R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT           16

#define R500_VAP_INDEX_OFFSET		    0x208c

#define R500_VAP_ALT_NUM_VERTICES                           0x2088

#define R300_VAP_OUTPUT_VTX_FMT_0           0x2090
#       define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT     (1<<0)
#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT (1<<1)
#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2)
#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3)
#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4)
#       define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16)

#define R300_VAP_OUTPUT_VTX_FMT_1           0x2094
	/* each of the following is 3 bits wide, specifies number
	   of components */
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
#       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
#	define R300_VAP_OUTPUT_VTX_FMT_1__NOT_PRESENT  0
#	define R300_VAP_OUTPUT_VTX_FMT_1__1_COMPONENT  1
#	define R300_VAP_OUTPUT_VTX_FMT_1__2_COMPONENTS 2
#	define R300_VAP_OUTPUT_VTX_FMT_1__3_COMPONENTS 3
#	define R300_VAP_OUTPUT_VTX_FMT_1__4_COMPONENTS 4

#define R300_VAP_VPORT_XSCALE                     0x2098
#define R300_VAP_VPORT_XOFFSET                    0x209c
#define R300_VAP_VPORT_YSCALE                     0x20a0
#define R300_VAP_VPORT_YOFFSET                    0x20a4
#define R300_VAP_VPORT_ZSCALE                     0x20a8
#define R300_VAP_VPORT_ZOFFSET                    0x20ac

#define R300_VAP_VTE_CNTL                         0x20b0
#define R300_SE_VTE_CNTL R300_VAP_VTE_CNTL
#   define R300_VPORT_X_SCALE_ENA                           (1 << 0)
#   define R300_VPORT_X_OFFSET_ENA                          (1 << 1)
#   define R300_VPORT_Y_SCALE_ENA                           (1 << 2)
#   define R300_VPORT_Y_OFFSET_ENA                          (1 << 3)
#   define R300_VPORT_Z_SCALE_ENA                           (1 << 4)
#   define R300_VPORT_Z_OFFSET_ENA                          (1 << 5)
#   define R300_VTX_XY_FMT                                  (1 << 8)
#   define R300_VTX_Z_FMT                                   (1 << 9)
#   define R300_VTX_W0_FMT                                  (1 << 10)
#   define R300_SERIAL_PROC_ENA                             (1 << 11)

#define R300_VAP_VTX_SIZE               0x20b4

/* BEGIN: Vertex data assembly - lots of uncertainties */

/* gap */

/* Maximum Vertex Indx Clamp */
#define R300_VAP_VF_MAX_VTX_INDX         0x2134
/* Minimum Vertex Indx Clamp */
#define R300_VAP_VF_MIN_VTX_INDX         0x2138

/** Vertex assembler/processor control status */
#define R300_VAP_CNTL_STATUS              0x2140
/* No swap at all (default) */
#	define R300_VC_NO_SWAP                  (0 << 0)
/* 16-bit swap: 0xAABBCCDD becomes 0xBBAADDCC */
#	define R300_VC_16BIT_SWAP               (1 << 0)
/* 32-bit swap: 0xAABBCCDD becomes 0xDDCCBBAA */
#	define R300_VC_32BIT_SWAP               (2 << 0)
/* Half-dword swap: 0xAABBCCDD becomes 0xCCDDAABB */
#	define R300_VC_HALF_DWORD_SWAP          (3 << 0)
/* The TCL engine will not be used (as it is logically or even physically removed) */
#	define R300_VAP_TCL_BYPASS		(1 << 8)
/* Read only flag if TCL engine is busy. */
#	define R300_VAP_PVS_BUSY                (1 << 11)
/* TODO: gap for MAX_MPS */
/* Read only flag if the vertex store is busy. */
#	define R300_VAP_VS_BUSY                 (1 << 24)
/* Read only flag if the reciprocal engine is busy. */
#	define R300_VAP_RCP_BUSY                (1 << 25)
/* Read only flag if the viewport transform engine is busy. */
#	define R300_VAP_VTE_BUSY                (1 << 26)
/* Read only flag if the memory interface unit is busy. */
#	define R300_VAP_MUI_BUSY                (1 << 27)
/* Read only flag if the vertex cache is busy. */
#	define R300_VAP_VC_BUSY                 (1 << 28)
/* Read only flag if the vertex fetcher is busy. */
#	define R300_VAP_VF_BUSY                 (1 << 29)
/* Read only flag if the register pipeline is busy. */
#	define R300_VAP_REGPIPE_BUSY            (1 << 30)
/* Read only flag if the VAP engine is busy. */
#	define R300_VAP_VAP_BUSY                (1 << 31)

/* gap */

/* Where do we get our vertex data?
 *
 * Vertex data either comes either from immediate mode registers or from
 * vertex arrays.
 * There appears to be no mixed mode (though we can force the pitch of
 * vertex arrays to 0, effectively reusing the same element over and over
 * again).
 *
 * Immediate mode is controlled by the INPUT_CNTL registers. I am not sure
 * if these registers influence vertex array processing.
 *
 * Vertex arrays are controlled via the 3D_LOAD_VBPNTR packet3.
 *
 * In both cases, vertex attributes are then passed through INPUT_ROUTE.
 *
 * Beginning with INPUT_ROUTE_0_0 is a list of WORDs that route vertex data
 * into the vertex processor's input registers.
 * The first word routes the first input, the second word the second, etc.
 * The corresponding input is routed into the register with the given index.
 * The list is ended by a word with INPUT_ROUTE_END set.
 *
 * Always set COMPONENTS_4 in immediate mode.
 */

#define R300_VAP_PROG_STREAM_CNTL_0                     0x2150
#       define R300_DATA_TYPE_0_SHIFT                   0
#       define R300_DATA_TYPE_FLOAT_1                   0
#       define R300_DATA_TYPE_FLOAT_2                   1
#       define R300_DATA_TYPE_FLOAT_3                   2
#       define R300_DATA_TYPE_FLOAT_4                   3
#       define R300_DATA_TYPE_BYTE                      4
#       define R300_DATA_TYPE_D3DCOLOR                  5
#       define R300_DATA_TYPE_SHORT_2                   6
#       define R300_DATA_TYPE_SHORT_4                   7
#       define R300_DATA_TYPE_VECTOR_3_TTT              8
#       define R300_DATA_TYPE_VECTOR_3_EET              9
#       define R300_DATA_TYPE_FLOAT_8                   10
#       define R300_DATA_TYPE_FLT16_2                   11
#       define R300_DATA_TYPE_FLT16_4                   12
#       define R300_SKIP_DWORDS_SHIFT                   4
#       define R300_DST_VEC_LOC_SHIFT                   8
#       define R300_LAST_VEC                            (1 << 13)
#       define R300_SIGNED                              (1 << 14)
#       define R300_NORMALIZE                           (1 << 15)
#       define R300_DATA_TYPE_1_SHIFT                   16
#define R300_VAP_PROG_STREAM_CNTL_1                     0x2154
#define R300_VAP_PROG_STREAM_CNTL_2                     0x2158
#define R300_VAP_PROG_STREAM_CNTL_3                     0x215C
#define R300_VAP_PROG_STREAM_CNTL_4                     0x2160
#define R300_VAP_PROG_STREAM_CNTL_5                     0x2164
#define R300_VAP_PROG_STREAM_CNTL_6                     0x2168
#define R300_VAP_PROG_STREAM_CNTL_7                     0x216C
/* gap */

/* Notes:
 *  - always set up to produce at least two attributes:
 *    if vertex program uses only position, fglrx will set normal, too
 *  - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal.
 */
#define R300_VAP_VTX_STATE_CNTL               0x2180
#       define R300_COLOR_0_ASSEMBLY_SHIFT    0
#       define R300_SEL_COLOR                 0
#       define R300_SEL_USER_COLOR_0          1
#       define R300_SEL_USER_COLOR_1          2
#       define R300_COLOR_1_ASSEMBLY_SHIFT    2
#       define R300_COLOR_2_ASSEMBLY_SHIFT    4
#       define R300_COLOR_3_ASSEMBLY_SHIFT    6
#       define R300_COLOR_4_ASSEMBLY_SHIFT    8
#       define R300_COLOR_5_ASSEMBLY_SHIFT    10
#       define R300_COLOR_6_ASSEMBLY_SHIFT    12
#       define R300_COLOR_7_ASSEMBLY_SHIFT    14
#       define R300_UPDATE_USER_COLOR_0_ENA   (1 << 16)

/*
 * Each bit in this field applies to the corresponding vector in the VSM
 * memory (i.e. Bit 0 applies to VECTOR_0 (POSITION), etc.). If the bit
 * is set, then the corresponding 4-Dword Vector is output into the Vertex Stream.
 */
#define R300_VAP_VSM_VTX_ASSM               0x2184
#       define R300_INPUT_CNTL_POS               0x00000001
#       define R300_INPUT_CNTL_NORMAL            0x00000002
#       define R300_INPUT_CNTL_COLOR             0x00000004
#       define R300_INPUT_CNTL_TC0               0x00000400
#       define R300_INPUT_CNTL_TC1               0x00000800
#       define R300_INPUT_CNTL_TC2               0x00001000 /* GUESS */
#       define R300_INPUT_CNTL_TC3               0x00002000 /* GUESS */
#       define R300_INPUT_CNTL_TC4               0x00004000 /* GUESS */
#       define R300_INPUT_CNTL_TC5               0x00008000 /* GUESS */
#       define R300_INPUT_CNTL_TC6               0x00010000 /* GUESS */
#       define R300_INPUT_CNTL_TC7               0x00020000 /* GUESS */

/* Programmable Stream Control Signed Normalize Control */
#define R300_VAP_PSC_SGN_NORM_CNTL                0x21dc
#   define SGN_NORM_ZERO                                    0
#   define SGN_NORM_ZERO_CLAMP_MINUS_ONE                    1
#   define SGN_NORM_NO_ZERO                                 2
#   define R300_SGN_NORM_NO_ZERO (SGN_NORM_NO_ZERO | \
        (SGN_NORM_NO_ZERO << 2) | (SGN_NORM_NO_ZERO << 4) | \
        (SGN_NORM_NO_ZERO << 6) | (SGN_NORM_NO_ZERO << 8) | \
        (SGN_NORM_NO_ZERO << 10) | (SGN_NORM_NO_ZERO << 12) | \
        (SGN_NORM_NO_ZERO << 14) | (SGN_NORM_NO_ZERO << 16) | \
        (SGN_NORM_NO_ZERO << 18) | (SGN_NORM_NO_ZERO << 20) | \
        (SGN_NORM_NO_ZERO << 22) | (SGN_NORM_NO_ZERO << 24) | \
        (SGN_NORM_NO_ZERO << 26) | (SGN_NORM_NO_ZERO << 28) | \
        (SGN_NORM_NO_ZERO << 30))

/* gap */

/* Words parallel to INPUT_ROUTE_0; All words that are active in INPUT_ROUTE_0
 * are set to a swizzling bit pattern, other words are 0.
 *
 * In immediate mode, the pattern is always set to xyzw. In vertex array
 * mode, the swizzling pattern is e.g. used to set zw components in texture
 * coordinates with only tweo components.
 */
#define R300_VAP_PROG_STREAM_CNTL_EXT_0                 0x21e0
#       define R300_SWIZZLE0_SHIFT                      0
#       define R300_SWIZZLE_SELECT_X_SHIFT              0
#       define R300_SWIZZLE_SELECT_Y_SHIFT              3
#       define R300_SWIZZLE_SELECT_Z_SHIFT              6
#       define R300_SWIZZLE_SELECT_W_SHIFT              9

#       define R300_SWIZZLE_SELECT_X                    0
#       define R300_SWIZZLE_SELECT_Y                    1
#       define R300_SWIZZLE_SELECT_Z                    2
#       define R300_SWIZZLE_SELECT_W                    3
#       define R300_SWIZZLE_SELECT_FP_ZERO              4
#       define R300_SWIZZLE_SELECT_FP_ONE               5
/* alternate forms for r300_emit.c */
#       define R300_INPUT_ROUTE_SELECT_X    0
#       define R300_INPUT_ROUTE_SELECT_Y    1
#       define R300_INPUT_ROUTE_SELECT_Z    2
#       define R300_INPUT_ROUTE_SELECT_W    3
#       define R300_INPUT_ROUTE_SELECT_ZERO 4
#       define R300_INPUT_ROUTE_SELECT_ONE  5

#       define R300_WRITE_ENA_SHIFT                     12
#       define R300_WRITE_ENA_X                         1
#       define R300_WRITE_ENA_Y                         2
#       define R300_WRITE_ENA_Z                         4
#       define R300_WRITE_ENA_W                         8
#       define R300_SWIZZLE1_SHIFT                      16

#       define R300_VAP_SWIZZLE_X001 \
        ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \
         (R300_SWIZZLE_SELECT_FP_ZERO << R300_SWIZZLE_SELECT_Y_SHIFT) | \
         (R300_SWIZZLE_SELECT_FP_ZERO << R300_SWIZZLE_SELECT_Z_SHIFT) | \
         (R300_SWIZZLE_SELECT_FP_ONE << R300_SWIZZLE_SELECT_W_SHIFT) | \
         (0xf << R300_WRITE_ENA_SHIFT))

#       define R300_VAP_SWIZZLE_XY01 \
        ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \
         (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \
         (R300_SWIZZLE_SELECT_FP_ZERO << R300_SWIZZLE_SELECT_Z_SHIFT) | \
         (R300_SWIZZLE_SELECT_FP_ONE << R300_SWIZZLE_SELECT_W_SHIFT) | \
         (0xf << R300_WRITE_ENA_SHIFT))

#       define R300_VAP_SWIZZLE_XYZ1 \
        ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \
         (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \
         (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \
         (R300_SWIZZLE_SELECT_FP_ONE << R300_SWIZZLE_SELECT_W_SHIFT) | \
         (0xf << R300_WRITE_ENA_SHIFT))

#       define R300_VAP_SWIZZLE_XYZW \
        ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \
         (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \
         (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \
         (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | \
         (0xf << R300_WRITE_ENA_SHIFT))

#define R300_VAP_PROG_STREAM_CNTL_EXT_1                 0x21e4
#define R300_VAP_PROG_STREAM_CNTL_EXT_2                 0x21e8
#define R300_VAP_PROG_STREAM_CNTL_EXT_3                 0x21ec
#define R300_VAP_PROG_STREAM_CNTL_EXT_4                 0x21f0
#define R300_VAP_PROG_STREAM_CNTL_EXT_5                 0x21f4
#define R300_VAP_PROG_STREAM_CNTL_EXT_6                 0x21f8
#define R300_VAP_PROG_STREAM_CNTL_EXT_7                 0x21fc

/* END: Vertex data assembly */

/* gap */

/* BEGIN: Upload vertex program and data */

/*
 * The programmable vertex shader unit has a memory bank of unknown size
 * that can be written to in 16 byte units by writing the address into
 * UPLOAD_ADDRESS, followed by data in UPLOAD_DATA (multiples of 4 DWORDs).
 *
 * Pointers into the memory bank are always in multiples of 16 bytes.
 *
 * The memory bank is divided into areas with fixed meaning.
 *
 * Starting at address UPLOAD_PROGRAM: Vertex program instructions.
 * Native limits reported by drivers from ATI suggest size 256 (i.e. 4KB),
 * whereas the difference between known addresses suggests size 512.
 *
 * Starting at address UPLOAD_PARAMETERS: Vertex program parameters.
 * Native reported limits and the VPI layout suggest size 256, whereas
 * difference between known addresses suggests size 512.
 *
 * At address UPLOAD_POINTSIZE is a vector (0, 0, ps, 0), where ps is the
 * floating point pointsize. The exact purpose of this state is uncertain,
 * as there is also the R300_RE_POINTSIZE register.
 *
 * Multiple vertex programs and parameter sets can be loaded at once,
 * which could explain the size discrepancy.
 */
#define R300_VAP_PVS_VECTOR_INDX_REG         0x2200
#       define R300_PVS_CODE_START           0
#       define R300_MAX_PVS_CODE_LINES       256
#       define R500_MAX_PVS_CODE_LINES       1024
#       define R300_PVS_CONST_START          512
#       define R500_PVS_CONST_START          1024
#       define R300_MAX_PVS_CONST_VECS       256
#       define R500_MAX_PVS_CONST_VECS       1024
#       define R300_PVS_UCP_START            1024
#       define R500_PVS_UCP_START            1536
#       define R300_POINT_VPORT_SCALE_OFFSET 1030
#       define R500_POINT_VPORT_SCALE_OFFSET 1542
#       define R300_POINT_GEN_TEX_OFFSET     1031
#       define R500_POINT_GEN_TEX_OFFSET     1543

/*
 * These are obsolete defines form r300_context.h, but they might give some
 * clues when investigating the addresses further...
 */
#if 0
#define VSF_DEST_PROGRAM        0x0
#define VSF_DEST_MATRIX0        0x200
#define VSF_DEST_MATRIX1        0x204
#define VSF_DEST_MATRIX2        0x208
#define VSF_DEST_VECTOR0        0x20c
#define VSF_DEST_VECTOR1        0x20d
#define VSF_DEST_UNKNOWN1       0x400
#define VSF_DEST_UNKNOWN2       0x406
#endif

/* gap */

#define R300_VAP_PVS_UPLOAD_DATA            0x2208

/* END: Upload vertex program and data */

/* gap */

/* I do not know the purpose of this register. However, I do know that
 * it is set to 221C_CLEAR for clear operations and to 221C_NORMAL
 * for normal rendering.
 *
 * 2007-11-05: This register is the user clip plane control register, but there
 * also seems to be a rendering mode control; the NORMAL/CLEAR defines.
 *
 * See bug #9871. http://bugs.freedesktop.org/attachment.cgi?id=10672&action=view
 */
#define R300_VAP_CLIP_CNTL                       0x221C
#       define R300_VAP_UCP_ENABLE_0             (1 << 0)
#       define R300_VAP_UCP_ENABLE_1             (1 << 1)
#       define R300_VAP_UCP_ENABLE_2             (1 << 2)
#       define R300_VAP_UCP_ENABLE_3             (1 << 3)
#       define R300_VAP_UCP_ENABLE_4             (1 << 4)
#       define R300_VAP_UCP_ENABLE_5             (1 << 5)
#       define R300_PS_UCP_MODE_DIST_COP         (0 << 14)
#       define R300_PS_UCP_MODE_RADIUS_COP       (1 << 14)
#       define R300_PS_UCP_MODE_RADIUS_COP_CLIP  (2 << 14)
#       define R300_PS_UCP_MODE_CLIP_AS_TRIFAN   (3 << 14)
#       define R300_CLIP_DISABLE                 (1 << 16)
#       define R300_UCP_CULL_ONLY_ENABLE         (1 << 17)
#       define R300_BOUNDARY_EDGE_FLAG_ENABLE    (1 << 18)
#       define R500_COLOR2_IS_TEXTURE            (1 << 20)
#       define R500_COLOR3_IS_TEXTURE            (1 << 21)

/* These seem to be per-pixel and per-vertex X and Y clipping planes. The first
 * plane is per-pixel and the second plane is per-vertex.
 *
 * This was determined by experimentation alone but I believe it is correct.
 *
 * These registers are called X_QUAD0_1_FL to X_QUAD0_4_FL by glxtest.
 */
#define R300_VAP_GB_VERT_CLIP_ADJ                   0x2220
#define R300_VAP_GB_VERT_DISC_ADJ                   0x2224
#define R300_VAP_GB_HORZ_CLIP_ADJ                   0x2228
#define R300_VAP_GB_HORZ_DISC_ADJ                   0x222c

/* gap */

/* Sometimes, END_OF_PKT and 0x2284=0 are the only commands sent between
 * rendering commands and overwriting vertex program parameters.
 * Therefore, I suspect writing zero to 0x2284 synchronizes the engine and
 * avoids bugs caused by still running shaders reading bad data from memory.
 */
#define R300_VAP_PVS_STATE_FLUSH_REG        0x2284

/* This register is used to define the number of core clocks to wait for a
 * vertex to be received by the VAP input controller (while the primitive
 * path is backed up) before forcing any accumulated vertices to be submitted
 * to the vertex processing path.
 */
#define VAP_PVS_VTX_TIMEOUT_REG             0x2288
#       define R300_2288_R300                    0x00750000 /* -- nh */
#       define R300_2288_RV350                   0x0000FFFF /* -- Vladimir */

/* gap */

/* Addresses are relative to the vertex program instruction area of the
 * memory bank. PROGRAM_END points to the last instruction of the active
 * program
 *
 * The meaning of the two UNKNOWN fields is obviously not known. However,
 * experiments so far have shown that both *must* point to an instruction
 * inside the vertex program, otherwise the GPU locks up.
 *
 * fglrx usually sets CNTL_3_UNKNOWN to the end of the program and
 * R300_PVS_CNTL_1_POS_END_SHIFT points to instruction where last write to
 * position takes place.
 *
 * Most likely this is used to ignore rest of the program in cases
 * where group of verts arent visible. For some reason this "section"
 * is sometimes accepted other instruction that have no relationship with
 * position calculations.
 */
#define R300_VAP_PVS_CODE_CNTL_0            0x22D0
#       define R300_PVS_FIRST_INST_SHIFT         0
#       define R300_PVS_XYZW_VALID_INST_SHIFT    10
#       define R300_PVS_LAST_INST_SHIFT          20
#       define R300_PVS_FIRST_INST(x)            ((x) << 0)
#       define R300_PVS_XYZW_VALID_INST(x)       ((x) << 10)
#       define R300_PVS_LAST_INST(x)             ((x) << 20)
/* Addresses are relative to the vertex program parameters area. */
#define R300_VAP_PVS_CONST_CNTL             0x22D4
#       define R300_PVS_CONST_BASE_OFFSET_SHIFT  0
#       define R300_PVS_MAX_CONST_ADDR_SHIFT     16
#       define R300_PVS_MAX_CONST_ADDR(x)        ((x) << 16)
#define R300_VAP_PVS_CODE_CNTL_1	    0x22D8
#       define R300_PVS_LAST_VTX_SRC_INST_SHIFT  0
#define R300_VAP_PVS_FLOW_CNTL_OPC          0x22DC

/* The entire range from 0x2300 to 0x2AC inclusive seems to be used for
 * immediate vertices
 */
#define R300_VAP_VTX_COLOR_R                0x2464
#define R300_VAP_VTX_COLOR_G                0x2468
#define R300_VAP_VTX_COLOR_B                0x246C
#define R300_VAP_VTX_POS_0_X_1              0x2490 /* used for glVertex2*() */
#define R300_VAP_VTX_POS_0_Y_1              0x2494
#define R300_VAP_VTX_COLOR_PKD              0x249C /* RGBA */
#define R300_VAP_VTX_POS_0_X_2              0x24A0 /* used for glVertex3*() */
#define R300_VAP_VTX_POS_0_Y_2              0x24A4
#define R300_VAP_VTX_POS_0_Z_2              0x24A8
/* write 0 to indicate end of packet? */
#define R300_VAP_VTX_END_OF_PKT             0x24AC

/* gap */

/* These are values from r300_reg/r300_reg.h - they are known to be correct
 * and are here so we can use one register file instead of several
 * - Vladimir
 */
#define R300_GB_VAP_RASTER_VTX_FMT_0	0x4000
#	define R300_GB_VAP_RASTER_VTX_FMT_0__POS_PRESENT	(1<<0)
#	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_0_PRESENT	(1<<1)
#	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_1_PRESENT	(1<<2)
#	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_2_PRESENT	(1<<3)
#	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_3_PRESENT	(1<<4)
#	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_SPACE	(0xf<<5)
#	define R300_GB_VAP_RASTER_VTX_FMT_0__PT_SIZE_PRESENT	(0x1<<16)

#define R300_GB_VAP_RASTER_VTX_FMT_1	0x4004
	/* each of the following is 3 bits wide, specifies number
	   of components */
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT	0
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT	3
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT	6
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT	9
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT	12
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT	15
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT	18
#	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT	21

/* UNK30 seems to enables point to quad transformation on textures
 * (or something closely related to that).
 * This bit is rather fatal at the time being due to lackings at pixel
 * shader side
 * Specifies top of Raster pipe specific enable controls.
 */
#define R300_GB_ENABLE	0x4008
#	define R300_GB_POINT_STUFF_DISABLE     (0 << 0)
#	define R300_GB_POINT_STUFF_ENABLE      (1 << 0) /* Specifies if points will have stuffed texture coordinates. */
#	define R300_GB_LINE_STUFF_DISABLE      (0 << 1)
#	define R300_GB_LINE_STUFF_ENABLE       (1 << 1) /* Specifies if lines will have stuffed texture coordinates. */
#	define R300_GB_TRIANGLE_STUFF_DISABLE  (0 << 2)
#	define R300_GB_TRIANGLE_STUFF_ENABLE   (1 << 2) /* Specifies if triangles will have stuffed texture coordinates. */
#	define R300_GB_STENCIL_AUTO_DISABLE    (0 << 4)
#	define R300_GB_STENCIL_AUTO_ENABLE     (1 << 4) /* Enable stencil auto inc/dec based on triangle cw/ccw, force into dzy low bit. */
#	define R300_GB_STENCIL_AUTO_FORCE      (2 << 4) /* Force 0 into dzy low bit. */

	/* each of the following is 2 bits wide */
#define R300_GB_TEX_REPLICATE	0 /* Replicate VAP source texture coordinates (S,T,[R,Q]). */
#define R300_GB_TEX_ST		1 /* Stuff with source texture coordinates (S,T). */
#define R300_GB_TEX_STR		2 /* Stuff with source texture coordinates (S,T,R). */
#	define R300_GB_TEX0_SOURCE_SHIFT	16
#	define R300_GB_TEX1_SOURCE_SHIFT	18
#	define R300_GB_TEX2_SOURCE_SHIFT	20
#	define R300_GB_TEX3_SOURCE_SHIFT	22
#	define R300_GB_TEX4_SOURCE_SHIFT	24
#	define R300_GB_TEX5_SOURCE_SHIFT	26
#	define R300_GB_TEX6_SOURCE_SHIFT	28
#	define R300_GB_TEX7_SOURCE_SHIFT	30

/* MSPOS - positions for multisample antialiasing (?) */
#define R300_GB_MSPOS0                           0x4010
	/* shifts - each of the fields is 4 bits */
#	define R300_GB_MSPOS0__MS_X0_SHIFT	0
#	define R300_GB_MSPOS0__MS_Y0_SHIFT	4
#	define R300_GB_MSPOS0__MS_X1_SHIFT	8
#	define R300_GB_MSPOS0__MS_Y1_SHIFT	12
#	define R300_GB_MSPOS0__MS_X2_SHIFT	16
#	define R300_GB_MSPOS0__MS_Y2_SHIFT	20
#	define R300_GB_MSPOS0__MSBD0_Y		24
#	define R300_GB_MSPOS0__MSBD0_X		28

#define R300_GB_MSPOS1                           0x4014
#	define R300_GB_MSPOS1__MS_X3_SHIFT	0
#	define R300_GB_MSPOS1__MS_Y3_SHIFT	4
#	define R300_GB_MSPOS1__MS_X4_SHIFT	8
#	define R300_GB_MSPOS1__MS_Y4_SHIFT	12
#	define R300_GB_MSPOS1__MS_X5_SHIFT	16
#	define R300_GB_MSPOS1__MS_Y5_SHIFT	20
#	define R300_GB_MSPOS1__MSBD1		24

/* Specifies the graphics pipeline configuration for rasterization. */
#define R300_GB_TILE_CONFIG                      0x4018
#	define R300_GB_TILE_DISABLE             (0 << 0)
#	define R300_GB_TILE_ENABLE              (1 << 0)
#	define R300_GB_TILE_PIPE_COUNT_RV300	(0 << 1) /* RV350 (1 pipe, 1 ctx) */
#	define R300_GB_TILE_PIPE_COUNT_R300	(3 << 1) /* R300 (2 pipes, 1 ctx) */
#	define R300_GB_TILE_PIPE_COUNT_R420_3P  (6 << 1) /* R420-3P (3 pipes, 1 ctx) */
#	define R300_GB_TILE_PIPE_COUNT_R420	(7 << 1) /* R420 (4 pipes, 1 ctx) */
#	define R300_GB_TILE_SIZE_8		(0 << 4)
#	define R300_GB_TILE_SIZE_16		(1 << 4)
#	define R300_GB_TILE_SIZE_32		(2 << 4)
#	define R300_GB_SUPER_SIZE_1		(0 << 6)
#	define R300_GB_SUPER_SIZE_2		(1 << 6)
#	define R300_GB_SUPER_SIZE_4		(2 << 6)
#	define R300_GB_SUPER_SIZE_8		(3 << 6)
#	define R300_GB_SUPER_SIZE_16		(4 << 6)
#	define R300_GB_SUPER_SIZE_32		(5 << 6)
#	define R300_GB_SUPER_SIZE_64		(6 << 6)
#	define R300_GB_SUPER_SIZE_128		(7 << 6)
#	define R300_GB_SUPER_X_SHIFT		9	/* 3 bits wide */
#	define R300_GB_SUPER_Y_SHIFT		12	/* 3 bits wide */
#	define R300_GB_SUPER_TILE_A		(0 << 15)
#	define R300_GB_SUPER_TILE_B		(1 << 15)
#	define R300_GB_SUBPIXEL_1_12		(0 << 16)
#	define R300_GB_SUBPIXEL_1_16		(1 << 16)
#	define R300_GB_TILE_CONFIG_QUADS_PER_RAS_4   (0 << 17)
#	define R300_GB_TILE_CONFIG_QUADS_PER_RAS_8   (1 << 17)
#	define R300_GB_TILE_CONFIG_QUADS_PER_RAS_16  (2 << 17)
#	define R300_GB_TILE_CONFIG_QUADS_PER_RAS_32  (3 << 17)
#	define R300_GB_TILE_CONFIG_BB_SCAN_INTERCEPT (0 << 19)
#	define R300_GB_TILE_CONFIG_BB_SCAN_BOUND_BOX (1 << 19)
#	define R300_GB_TILE_CONFIG_ALT_SCAN_EN_LR    (0 << 20)
#	define R300_GB_TILE_CONFIG_ALT_SCAN_EN_LRL   (1 << 20)
#	define R300_GB_TILE_CONFIG_ALT_OFFSET        (0 << 21)
#	define R300_GB_TILE_CONFIG_SUBPRECISION      (0 << 22)
#	define R300_GB_TILE_CONFIG_ALT_TILING_DEF    (0 << 23)
#	define R300_GB_TILE_CONFIG_ALT_TILING_3_2    (1 << 23)
#	define R300_GB_TILE_CONFIG_Z_EXTENDED_24_1   (0 << 24)
#	define R300_GB_TILE_CONFIG_Z_EXTENDED_S25_1  (1 << 24)

/* Specifies the sizes of the various FIFO`s in the sc/rs/us. This register must be the first one written */
#define R300_GB_FIFO_SIZE	0x4024
	/* each of the following is 2 bits wide */
#define R300_GB_FIFO_SIZE_32	0
#define R300_GB_FIFO_SIZE_64	1
#define R300_GB_FIFO_SIZE_128	2
#define R300_GB_FIFO_SIZE_256	3
#	define R300_SC_IFIFO_SIZE_SHIFT	0
#	define R300_SC_TZFIFO_SIZE_SHIFT	2
#	define R300_SC_BFIFO_SIZE_SHIFT	4

#	define R300_US_OFIFO_SIZE_SHIFT	12
#	define R300_US_WFIFO_SIZE_SHIFT	14
	/* the following use the same constants as above, but meaning is
	   is times 2 (i.e. instead of 32 words it means 64 */
#	define R300_RS_TFIFO_SIZE_SHIFT	6
#	define R300_RS_CFIFO_SIZE_SHIFT	8
#	define R300_US_RAM_SIZE_SHIFT		10
	/* watermarks, 3 bits wide */
#	define R300_RS_HIGHWATER_COL_SHIFT	16
#	define R300_RS_HIGHWATER_TEX_SHIFT	19
#	define R300_OFIFO_HIGHWATER_SHIFT	22	/* two bits only */
#	define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT	24

#define R300_GB_Z_PEQ_CONFIG                          0x4028
#	define R300_GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_4_4    (0 << 0)
#	define R300_GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8    (1 << 0)

/* Specifies various polygon specific selects (fog, depth, perspective). */
#define R300_GB_SELECT                           0x401c
#	define R300_GB_FOG_SELECT_C0A		(0 << 0)
#	define R300_GB_FOG_SELECT_C1A           (1 << 0)
#	define R300_GB_FOG_SELECT_C2A           (2 << 0)
#	define R300_GB_FOG_SELECT_C3A           (3 << 0)
#	define R300_GB_FOG_SELECT_1_1_W         (4 << 0)
#	define R300_GB_FOG_SELECT_Z		(5 << 0)
#	define R300_GB_DEPTH_SELECT_Z		(0 << 3)
#	define R300_GB_DEPTH_SELECT_1_1_W	(1 << 3)
#	define R300_GB_W_SELECT_1_W		(0 << 4)
#	define R300_GB_W_SELECT_1		(1 << 4)
#	define R300_GB_FOG_STUFF_DISABLE        (0 << 5)
#	define R300_GB_FOG_STUFF_ENABLE         (1 << 5)
#	define R300_GB_FOG_STUFF_TEX_SHIFT      6
#	define R300_GB_FOG_STUFF_TEX_MASK       0x000003c0
#	define R300_GB_FOG_STUFF_COMP_SHIFT     10
#	define R300_GB_FOG_STUFF_COMP_MASK      0x00000c00

/* Specifies the graphics pipeline configuration for antialiasing. */
#define R300_GB_AA_CONFIG                         0x4020
#	define R300_GB_AA_CONFIG_AA_DISABLE           (0 << 0)
#	define R300_GB_AA_CONFIG_AA_ENABLE            (1 << 0)
#	define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2  (0 << 1)
#	define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3  (1 << 1)
#	define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4  (2 << 1)
#	define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6  (3 << 1)

/* Selects which of 4 pipes are active. */
#define R300_GB_PIPE_SELECT                           0x402c
#	define R300_GB_PIPE_SELECT_PIPE0_ID_SHIFT  0
#	define R300_GB_PIPE_SELECT_PIPE1_ID_SHIFT  2
#	define R300_GB_PIPE_SELECT_PIPE2_ID_SHIFT  4
#	define R300_GB_PIPE_SELECT_PIPE3_ID_SHIFT  6
#	define R300_GB_PIPE_SELECT_PIPE_MASK_SHIFT 8
#	define R300_GB_PIPE_SELECT_MAX_PIPE        12
#	define R300_GB_PIPE_SELECT_BAD_PIPES       14
#	define R300_GB_PIPE_SELECT_CONFIG_PIPES    18


/* Specifies the sizes of the various FIFO`s in the sc/rs. */
#define R300_GB_FIFO_SIZE1                            0x4070
/* High water mark for SC input fifo */
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_SHIFT 0
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_MASK  0x0000003f
/* High water mark for SC input fifo (B) */
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_SHIFT 6
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_MASK  0x00000fc0
/* High water mark for RS colors' fifo */
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_COL_SHIFT   12
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_COL_MASK    0x0003f000
/* High water mark for RS textures' fifo */
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_TEX_SHIFT   18
#	define R300_GB_FIFO_SIZE1_SC_HIGHWATER_TEX_MASK    0x00fc0000

/* This table specifies the source location and format for up to 16 texture
 * addresses (i[0]:i[15]) and four colors (c[0]:c[3])
 */
#define R500_RS_IP_0					0x4074
#define R500_RS_IP_1					0x4078
#define R500_RS_IP_2					0x407C
#define R500_RS_IP_3					0x4080
#define R500_RS_IP_4					0x4084
#define R500_RS_IP_5					0x4088
#define R500_RS_IP_6					0x408C
#define R500_RS_IP_7					0x4090
#define R500_RS_IP_8					0x4094
#define R500_RS_IP_9					0x4098
#define R500_RS_IP_10					0x409C
#define R500_RS_IP_11					0x40A0
#define R500_RS_IP_12					0x40A4
#define R500_RS_IP_13					0x40A8
#define R500_RS_IP_14					0x40AC
#define R500_RS_IP_15					0x40B0
#define R500_RS_IP_PTR_K0                               62
#define R500_RS_IP_PTR_K1                               63
#define R500_RS_IP_TEX_PTR_S_SHIFT 			0
#define R500_RS_IP_TEX_PTR_T_SHIFT 			6
#define R500_RS_IP_TEX_PTR_R_SHIFT 			12
#define R500_RS_IP_TEX_PTR_Q_SHIFT 			18
#define R500_RS_IP_COL_PTR_SHIFT 			24
#define R500_RS_IP_COL_FMT_SHIFT 			27
#       define R500_RS_SEL_S(x)                         ((x) << 0)
#       define R500_RS_SEL_T(x)                         ((x) << 6)
#       define R500_RS_SEL_R(x)                         ((x) << 12)
#       define R500_RS_SEL_Q(x)                         ((x) << 18)
#	define R500_RS_COL_PTR(x)		        ((x) << 24)
#       define R500_RS_COL_FMT(x)                       ((x) << 27)
/* gap */
#define R500_RS_IP_OFFSET_DIS 				(0 << 31)
#define R500_RS_IP_OFFSET_EN 				(1 << 31)

/* gap */

/* Zero to flush caches. */
#define R300_TX_INVALTAGS                   0x4100
#define R300_TX_FLUSH                       0x0

/* The upper enable bits are guessed, based on fglrx reported limits. */
#define R300_TX_ENABLE                      0x4104
#       define R300_TX_ENABLE_0                  (1 << 0)
#       define R300_TX_ENABLE_1                  (1 << 1)
#       define R300_TX_ENABLE_2                  (1 << 2)
#       define R300_TX_ENABLE_3                  (1 << 3)
#       define R300_TX_ENABLE_4                  (1 << 4)
#       define R300_TX_ENABLE_5                  (1 << 5)
#       define R300_TX_ENABLE_6                  (1 << 6)
#       define R300_TX_ENABLE_7                  (1 << 7)
#       define R300_TX_ENABLE_8                  (1 << 8)
#       define R300_TX_ENABLE_9                  (1 << 9)
#       define R300_TX_ENABLE_10                 (1 << 10)
#       define R300_TX_ENABLE_11                 (1 << 11)
#       define R300_TX_ENABLE_12                 (1 << 12)
#       define R300_TX_ENABLE_13                 (1 << 13)
#       define R300_TX_ENABLE_14                 (1 << 14)
#       define R300_TX_ENABLE_15                 (1 << 15)

#define R500_TX_FILTER_4		    0x4110
#	define R500_TX_WEIGHT_1_SHIFT            (0)
#	define R500_TX_WEIGHT_0_SHIFT            (11)
#	define R500_TX_WEIGHT_PAIR               (1<<22)
#	define R500_TX_PHASE_SHIFT               (23)
#	define R500_TX_DIRECTION_HORIZONTAL	 (0<<27)
#	define R500_TX_DIRECTION_VERITCAL	 (1<<27)

/* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) */
#define R300_GA_POINT_S0                              0x4200

/* T Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) */
#define R300_GA_POINT_T0                              0x4204

/* S Texture Coordinate of Vertex 2 for Point texture stuffing (URC) */
#define R300_GA_POINT_S1                              0x4208

/* T Texture Coordinate of Vertex 2 for Point texture stuffing (URC) */
#define R300_GA_POINT_T1                              0x420c

/* Specifies amount to shift integer position of vertex (screen space) before
 * converting to float for triangle stipple.
 */
#define R300_GA_TRIANGLE_STIPPLE            0x4214
#	define R300_GA_TRIANGLE_STIPPLE_X_SHIFT_SHIFT 0
#	define R300_GA_TRIANGLE_STIPPLE_X_SHIFT_MASK  0x0000000f
#	define R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT 16
#	define R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_MASK  0x000f0000

/* The pointsize is given in multiples of 6. The pointsize can be enormous:
 * Clear() renders a single point that fills the entire framebuffer.
 * 1/2 Height of point; fixed (16.0), subpixel format (1/12 or 1/16, even if in
 * 8b precision).
 */
#define R300_GA_POINT_SIZE                   0x421C
#       define R300_POINTSIZE_Y_SHIFT         0
#       define R300_POINTSIZE_Y_MASK          0x0000ffff
#       define R300_POINTSIZE_X_SHIFT         16
#       define R300_POINTSIZE_X_MASK          0xffff0000
#       define R300_POINTSIZE_MAX             (R300_POINTSIZE_Y_MASK / 6)

/* Red fill color */
#define R500_GA_FILL_R                                0x4220


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