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-rw-r--r--src/freedreno/ir3/ir3_compiler_nir.c2
-rw-r--r--src/freedreno/ir3/ir3_shader.h4
-rw-r--r--src/freedreno/vulkan/tu_pipeline.c2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 590b9455288..f7a68627a4c 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -1395,7 +1395,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
array_insert(ctx->ir, ctx->ir->predicates, kill);
array_insert(b, b->keeps, kill);
- ctx->so->has_kill = true;
+ ctx->so->no_earlyz = true;
break;
}
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index f8aa8522a55..d598dd76eee 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -431,8 +431,8 @@ struct ir3_shader_variant {
/* do we have one or more SSBO instructions: */
bool has_ssbo;
- /* do we have kill instructions: */
- bool has_kill;
+ /* do we have kill, image write, etc (which prevents early-z): */
+ bool no_earlyz;
/* Layout of constant registers, each section (in vec4). Pointer size
* is 32b (a3xx, a4xx), or 64b (a5xx+), which effects the size of the
diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c
index fc7739b86c2..2df032923cf 100644
--- a/src/freedreno/vulkan/tu_pipeline.c
+++ b/src/freedreno/vulkan/tu_pipeline.c
@@ -785,7 +785,7 @@ tu6_emit_fs_outputs(struct tu_cs *cs,
uint32_t gras_su_depth_plane_cntl = 0;
uint32_t rb_depth_plane_cntl = 0;
- if (fs->has_kill | fs->writes_pos) {
+ if (fs->no_earlyz | fs->writes_pos) {
gras_su_depth_plane_cntl |= A6XX_GRAS_SU_DEPTH_PLANE_CNTL_FRAG_WRITES_Z;
rb_depth_plane_cntl |= A6XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z;
}