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-rw-r--r--src/freedreno/ir3/ir3_compiler_nir.c3
-rw-r--r--src/freedreno/ir3/ir3_shader.h1
2 files changed, 0 insertions, 4 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 0e5491151d3..7f000cdc385 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -2396,7 +2396,6 @@ setup_input(struct ir3_context *ctx, nir_variable *in)
so->inputs[n].compmask = (1 << (ncomp + frac)) - 1;
so->inputs_count = MAX2(so->inputs_count, n + 1);
so->inputs[n].interpolate = in->data.interpolation;
- so->inputs[n].ncomp = ncomp;
if (ctx->so->type == MESA_SHADER_FRAGMENT) {
@@ -2513,7 +2512,6 @@ pack_inlocs(struct ir3_context *ctx)
for (unsigned i = 0; i < so->inputs_count; i++) {
unsigned compmask = 0, maxcomp = 0;
- so->inputs[i].ncomp = 0;
so->inputs[i].inloc = inloc;
so->inputs[i].bary = false;
@@ -2523,7 +2521,6 @@ pack_inlocs(struct ir3_context *ctx)
compmask |= (1 << j);
actual_in++;
- so->inputs[i].ncomp++;
maxcomp = j + 1;
/* at this point, since used_components[i] mask is only
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index b2d08fe95f3..bc7b6b43c88 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -451,7 +451,6 @@ struct ir3_shader_variant {
uint8_t slot;
uint8_t regid;
uint8_t compmask;
- uint8_t ncomp;
/* location of input (ie. offset passed to bary.f, etc). This
* matches the SP_VS_VPC_DST_REG.OUTLOCn value (a3xx and a4xx
* have the OUTLOCn value offset by 8, presumably to account