diff options
Diffstat (limited to 'src/freedreno/drm-shim/freedreno_noop.c')
| -rw-r--r-- | src/freedreno/drm-shim/freedreno_noop.c | 124 |
1 files changed, 121 insertions, 3 deletions
diff --git a/src/freedreno/drm-shim/freedreno_noop.c b/src/freedreno/drm-shim/freedreno_noop.c index 8f074be7397..48f1c8953f9 100644 --- a/src/freedreno/drm-shim/freedreno_noop.c +++ b/src/freedreno/drm-shim/freedreno_noop.c @@ -47,6 +47,14 @@ static struct msm_device msm = { .next_offset = 0x1000, }; +struct msm_device_info { + uint32_t gpu_id; + uint32_t chip_id; + uint32_t gmem_size; +}; + +static const struct msm_device_info *device_info; + static int msm_ioctl_noop(int fd, unsigned long request, void *arg) { @@ -108,16 +116,16 @@ msm_ioctl_get_param(int fd, unsigned long request, void *arg) switch (gp->param) { case MSM_PARAM_GPU_ID: - gp->value = 630; + gp->value = device_info->gpu_id; return 0; case MSM_PARAM_GMEM_SIZE: - gp->value = 1024 * 1024; + gp->value = device_info->gmem_size; return 0; case MSM_PARAM_GMEM_BASE: gp->value = 0x100000; return 0; case MSM_PARAM_CHIP_ID: - gp->value = (6 << 24) | (3 << 16) | (0 << 8) | (0xff << 0); + gp->value = device_info->chip_id; return 0; case MSM_PARAM_NR_RINGS: gp->value = 1; @@ -165,6 +173,114 @@ static ioctl_fn_t driver_ioctls[] = { [DRM_MSM_SUBMITQUEUE_QUERY] = msm_ioctl_noop, }; +#define CHIPID(maj, min, rev, pat) \ + ((maj << 24) | (min << 16) | (rev << 8) | (pat)) + +static const struct msm_device_info device_infos[] = { + { /* First entry is default */ + .gpu_id = 630, + .chip_id = CHIPID(6, 3, 0, 0xff), + .gmem_size = 1024 * 1024, + }, + { + .gpu_id = 200, + .chip_id = CHIPID(2, 0, 0, 0), + .gmem_size = 256 * 1024, + }, + { + .gpu_id = 201, + .chip_id = CHIPID(2, 0, 0, 1), + .gmem_size = 128 * 1024, + }, + { + .gpu_id = 220, + .chip_id = CHIPID(2, 2, 0, 0xff), + .gmem_size = 512 * 1024, + }, + { + .gpu_id = 305, + .chip_id = CHIPID(3, 0, 5, 0xff), + .gmem_size = 256 * 1024, + }, + { + .gpu_id = 307, + .chip_id = CHIPID(3, 0, 6, 0), + .gmem_size = 128 * 1024, + }, + { + .gpu_id = 320, + .chip_id = CHIPID(3, 2, 0xff, 0xff), + .gmem_size = 512 * 1024, + }, + { + .gpu_id = 330, + .chip_id = CHIPID(3, 3, 0, 0xff), + .gmem_size = 1024 * 1024, + }, + { + .gpu_id = 420, + .chip_id = CHIPID(4, 2, 0, 0xff), + .gmem_size = 1536 * 1024, + }, + { + .gpu_id = 430, + .chip_id = CHIPID(4, 3, 0, 0xff), + .gmem_size = 1536 * 1024, + }, + { + .gpu_id = 510, + .chip_id = CHIPID(5, 1, 0, 0xff), + .gmem_size = 256 * 1024, + }, + { + .gpu_id = 530, + .chip_id = CHIPID(5, 3, 0, 2), + .gmem_size = 1024 * 1024, + }, + { + .gpu_id = 540, + .chip_id = CHIPID(5, 4, 0, 2), + .gmem_size = 1024 * 1024, + }, + { + .gpu_id = 618, + .chip_id = CHIPID(6, 1, 8, 0xff), + .gmem_size = 512 * 1024, + }, + { + .gpu_id = 630, + .chip_id = CHIPID(6, 3, 0, 0xff), + .gmem_size = 1024 * 1024, + }, +}; + + +static void +msm_driver_get_device_info(void) +{ + const char *env = getenv("FD_GPU_ID"); + + if (!env) { + device_info = &device_infos[0]; + return; + } + + int gpu_id = atoi(env); + for (int i = 0; i < ARRAY_SIZE(device_infos); i++) { + if (device_infos[i].gpu_id == gpu_id) { + device_info = &device_infos[i]; + return; + } + } + + fprintf(stderr, "FD_GPU_ID unrecognized, shim supports %d", + device_infos[0].gpu_id); + for (int i = 1; i < ARRAY_SIZE(device_infos); i++) + fprintf(stderr, ", %d", device_infos[i].gpu_id); + fprintf(stderr, "\n"); + abort(); +} + void drm_shim_driver_init(void) { @@ -178,6 +294,8 @@ drm_shim_driver_init(void) shim_device.version_minor = 5; shim_device.version_patchlevel = 0; + msm_driver_get_device_info(); + drm_shim_override_file("OF_FULLNAME=/rdb/msm\n" "OF_COMPATIBLE_N=1\n" "OF_COMPATIBLE_0=qcom,adreno\n", |