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-rw-r--r--src/amd/compiler/aco_instruction_selection.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 195c57950c5..ff39ad854cd 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -9501,15 +9501,15 @@ void fix_ls_vgpr_init_bug(isel_context *ctx, Pseudo_instruction *startpgm)
/* If there are no HS threads, SPI mistakenly loads the LS VGPRs starting at VGPR 0. */
- Temp instance_id = bld.sop2(aco_opcode::v_cndmask_b32, bld.def(v1),
+ Temp instance_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1),
get_arg(ctx, ctx->args->ac.instance_id),
get_arg(ctx, ctx->args->rel_auto_id),
ls_has_nonzero_hs_threads);
- Temp rel_auto_id = bld.sop2(aco_opcode::v_cndmask_b32, bld.def(v1),
+ Temp rel_auto_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1),
get_arg(ctx, ctx->args->rel_auto_id),
get_arg(ctx, ctx->args->ac.tcs_rel_ids),
ls_has_nonzero_hs_threads);
- Temp vertex_id = bld.sop2(aco_opcode::v_cndmask_b32, bld.def(v1),
+ Temp vertex_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1),
get_arg(ctx, ctx->args->ac.vertex_id),
get_arg(ctx, ctx->args->ac.tcs_patch_id),
ls_has_nonzero_hs_threads);