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-rw-r--r--src/amd/addrlib/r800/ciaddrlib.cpp3
-rw-r--r--src/amd/addrlib/r800/ciaddrlib.h1
-rw-r--r--src/amd/common/amd_family.h1
-rw-r--r--src/amd/common/amdgpu_id.h4
4 files changed, 8 insertions, 1 deletions
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp
index 7c5d29a2166..c726c4d8dd0 100644
--- a/src/amd/addrlib/r800/ciaddrlib.cpp
+++ b/src/amd/addrlib/r800/ciaddrlib.cpp
@@ -353,6 +353,7 @@ AddrChipFamily CIAddrLib::HwlConvertChipFamily(
m_settings.isFiji = ASICREV_IS_FIJI_P(uChipRevision);
m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision);
m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision);
+ m_settings.isPolaris12 = ASICREV_IS_POLARIS12_V(uChipRevision);
break;
case FAMILY_CZ:
m_settings.isCarrizo = 1;
@@ -417,7 +418,7 @@ BOOL_32 CIAddrLib::HwlInitGlobalParams(
{
m_pipes = 16;
}
- else if (m_settings.isPolaris11)
+ else if (m_settings.isPolaris11 || m_settings.isPolaris12)
{
m_pipes = 4;
}
diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h
index de995fa4058..2c9a4cce7a6 100644
--- a/src/amd/addrlib/r800/ciaddrlib.h
+++ b/src/amd/addrlib/r800/ciaddrlib.h
@@ -62,6 +62,7 @@ struct CIChipSettings
UINT_32 isFiji : 1;
UINT_32 isPolaris10 : 1;
UINT_32 isPolaris11 : 1;
+ UINT_32 isPolaris12 : 1;
// VI fusion (Carrizo)
UINT_32 isCarrizo : 1;
};
diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h
index 6a713ad7641..b09bbb89a3f 100644
--- a/src/amd/common/amd_family.h
+++ b/src/amd/common/amd_family.h
@@ -91,6 +91,7 @@ enum radeon_family {
CHIP_STONEY,
CHIP_POLARIS10,
CHIP_POLARIS11,
+ CHIP_POLARIS12,
CHIP_LAST,
};
diff --git a/src/amd/common/amdgpu_id.h b/src/amd/common/amdgpu_id.h
index f91df55711a..1683a5a746c 100644
--- a/src/amd/common/amdgpu_id.h
+++ b/src/amd/common/amdgpu_id.h
@@ -142,6 +142,8 @@ enum {
VI_POLARIS11_M_A0 = 90,
+ VI_POLARIS12_V_A0 = 100,
+
VI_UNKNOWN = 0xFF
};
@@ -156,6 +158,8 @@ enum {
((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0))
#define ASICREV_IS_POLARIS11_M(eChipRev) \
(eChipRev >= VI_POLARIS11_M_A0)
+#define ASICREV_IS_POLARIS12_V(eChipRev)\
+ (eChipRev >= VI_POLARIS12_V_A0)
/* CZ specific rev IDs */
enum {