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-rw-r--r--src/amd/vulkan/radv_meta_blit.c4
-rw-r--r--src/amd/vulkan/radv_meta_blit2d.c4
-rw-r--r--src/amd/vulkan/radv_meta_clear.c2
-rw-r--r--src/amd/vulkan/radv_meta_decompress.c2
-rw-r--r--src/amd/vulkan/radv_pipeline.c22
-rw-r--r--src/amd/vulkan/vk_format.h13
6 files changed, 36 insertions, 11 deletions
diff --git a/src/amd/vulkan/radv_meta_blit.c b/src/amd/vulkan/radv_meta_blit.c
index 89ff82ec68d..718e9c50e6e 100644
--- a/src/amd/vulkan/radv_meta_blit.c
+++ b/src/amd/vulkan/radv_meta_blit.c
@@ -881,7 +881,7 @@ radv_device_init_meta_blit_depth(struct radv_device *device,
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
- .format = 0,
+ .format = VK_FORMAT_D32_SFLOAT,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
.initialLayout = VK_IMAGE_LAYOUT_GENERAL,
@@ -1039,7 +1039,7 @@ radv_device_init_meta_blit_stencil(struct radv_device *device,
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
- .format = 0,
+ .format = VK_FORMAT_S8_UINT,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
.initialLayout = VK_IMAGE_LAYOUT_GENERAL,
diff --git a/src/amd/vulkan/radv_meta_blit2d.c b/src/amd/vulkan/radv_meta_blit2d.c
index fb14cfbcdda..2f18350fd71 100644
--- a/src/amd/vulkan/radv_meta_blit2d.c
+++ b/src/amd/vulkan/radv_meta_blit2d.c
@@ -858,7 +858,7 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
- .format = 0,
+ .format = VK_FORMAT_D32_SFLOAT,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
.initialLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
@@ -1013,7 +1013,7 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
- .format = 0,
+ .format = VK_FORMAT_S8_UINT,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
.initialLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 06485137fc7..bd979973e71 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -455,7 +455,7 @@ create_depthstencil_renderpass(struct radv_device *device,
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
- .format = VK_FORMAT_UNDEFINED,
+ .format = VK_FORMAT_D32_SFLOAT_S8_UINT,
.samples = samples,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
diff --git a/src/amd/vulkan/radv_meta_decompress.c b/src/amd/vulkan/radv_meta_decompress.c
index 5a348636907..7afe08fbdb2 100644
--- a/src/amd/vulkan/radv_meta_decompress.c
+++ b/src/amd/vulkan/radv_meta_decompress.c
@@ -36,7 +36,7 @@ create_pass(struct radv_device *device)
const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
VkAttachmentDescription attachment;
- attachment.format = VK_FORMAT_UNDEFINED;
+ attachment.format = VK_FORMAT_D32_SFLOAT_S8_UINT;
attachment.samples = 1;
attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 49610a1a223..061121b8245 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1217,12 +1217,24 @@ radv_pipeline_init_depth_stencil_state(struct radv_pipeline *pipeline,
memset(ds, 0, sizeof(*ds));
if (!vkds)
return;
- ds->db_depth_control = S_028800_Z_ENABLE(vkds->depthTestEnable ? 1 : 0) |
- S_028800_Z_WRITE_ENABLE(vkds->depthWriteEnable ? 1 : 0) |
- S_028800_ZFUNC(vkds->depthCompareOp) |
- S_028800_DEPTH_BOUNDS_ENABLE(vkds->depthBoundsTestEnable ? 1 : 0);
- if (vkds->stencilTestEnable) {
+ RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass);
+ struct radv_subpass *subpass = pass->subpasses + pCreateInfo->subpass;
+ if (subpass->depth_stencil_attachment.attachment == VK_ATTACHMENT_UNUSED)
+ return;
+
+ struct radv_render_pass_attachment *attachment = pass->attachments + subpass->depth_stencil_attachment.attachment;
+ bool has_depth_attachment = vk_format_is_depth(attachment->format);
+ bool has_stencil_attachment = vk_format_is_stencil(attachment->format);
+
+ if (has_depth_attachment) {
+ ds->db_depth_control = S_028800_Z_ENABLE(vkds->depthTestEnable ? 1 : 0) |
+ S_028800_Z_WRITE_ENABLE(vkds->depthWriteEnable ? 1 : 0) |
+ S_028800_ZFUNC(vkds->depthCompareOp) |
+ S_028800_DEPTH_BOUNDS_ENABLE(vkds->depthBoundsTestEnable ? 1 : 0);
+ }
+
+ if (has_stencil_attachment && vkds->stencilTestEnable) {
ds->db_depth_control |= S_028800_STENCIL_ENABLE(1) | S_028800_BACKFACE_ENABLE(1);
ds->db_depth_control |= S_028800_STENCILFUNC(vkds->front.compareOp);
ds->db_stencil_control |= S_02842C_STENCILFAIL(si_translate_stencil_op(vkds->front.failOp));
diff --git a/src/amd/vulkan/vk_format.h b/src/amd/vulkan/vk_format.h
index af71e29f6ad..c2c7ca4ce24 100644
--- a/src/amd/vulkan/vk_format.h
+++ b/src/amd/vulkan/vk_format.h
@@ -367,6 +367,19 @@ vk_format_is_depth(VkFormat format)
}
static inline bool
+vk_format_is_stencil(VkFormat format)
+{
+ const struct vk_format_description *desc = vk_format_description(format);
+
+ assert(desc);
+ if (!desc) {
+ return false;
+ }
+
+ return vk_format_has_stencil(desc);
+}
+
+static inline bool
vk_format_is_color(VkFormat format)
{
return !vk_format_is_depth_or_stencil(format);