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-rw-r--r--src/amd/common/ac_nir_to_llvm.c4
-rw-r--r--src/amd/common/ac_nir_to_llvm.h3
-rw-r--r--src/amd/common/ac_shader_info.c3
-rw-r--r--src/amd/common/ac_shader_info.h1
-rw-r--r--src/amd/vulkan/radv_pipeline.c6
5 files changed, 7 insertions, 10 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 864f58b56d0..f1db730a25c 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -4209,14 +4209,10 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
break;
case nir_intrinsic_load_primitive_id:
if (ctx->stage == MESA_SHADER_GEOMETRY) {
- if (ctx->nctx)
- ctx->nctx->shader_info->gs.uses_prim_id = true;
result = ctx->abi->gs_prim_id;
} else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
- ctx->nctx->shader_info->tcs.uses_prim_id = true;
result = ctx->nctx->tcs_patch_id;
} else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
- ctx->nctx->shader_info->tcs.uses_prim_id = true;
result = ctx->nctx->tes_patch_id;
} else
fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 1d9ec8ce8b0..6c59ab916ce 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -191,10 +191,8 @@ struct ac_shader_variant_info {
unsigned invocations;
unsigned gsvs_vertex_size;
unsigned max_gsvs_emit_size;
- bool uses_prim_id;
} gs;
struct {
- bool uses_prim_id;
unsigned tcs_vertices_out;
/* Which outputs are actually written */
uint64_t outputs_written;
@@ -210,7 +208,6 @@ struct ac_shader_variant_info {
enum gl_tess_spacing spacing;
bool ccw;
bool point_mode;
- bool uses_prim_id;
} tes;
};
};
diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 5dac1131bd0..27896a26bb4 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -73,6 +73,9 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, struct ac_shader_info *info)
case nir_intrinsic_load_invocation_id:
info->uses_invocation_id = true;
break;
+ case nir_intrinsic_load_primitive_id:
+ info->uses_prim_id = true;
+ break;
case nir_intrinsic_vulkan_resource_index:
info->desc_set_used_mask |= (1 << nir_intrinsic_desc_set(instr));
break;
diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h
index 7c79d1a728e..437859f8910 100644
--- a/src/amd/common/ac_shader_info.h
+++ b/src/amd/common/ac_shader_info.h
@@ -32,6 +32,7 @@ struct ac_shader_info {
uint32_t desc_set_used_mask;
bool needs_multiview_view_index;
bool uses_invocation_id;
+ bool uses_prim_id;
struct {
bool has_vertex_buffers; /* needs vertex buffers and base/start */
bool needs_draw_id;
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 9b5728ee9e7..8a80b2a6e1b 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2514,12 +2514,12 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input)
pipeline->graphics.ia_switch_on_eoi = true;
if (radv_pipeline_has_gs(pipeline) &&
- pipeline->shaders[MESA_SHADER_GEOMETRY]->info.gs.uses_prim_id)
+ pipeline->shaders[MESA_SHADER_GEOMETRY]->info.info.uses_prim_id)
pipeline->graphics.ia_switch_on_eoi = true;
if (radv_pipeline_has_tess(pipeline)) {
/* SWITCH_ON_EOI must be set if PrimID is used. */
- if (pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.uses_prim_id ||
- radv_get_tess_eval_shader(pipeline)->info.tes.uses_prim_id)
+ if (pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.info.uses_prim_id ||
+ radv_get_tess_eval_shader(pipeline)->info.info.uses_prim_id)
pipeline->graphics.ia_switch_on_eoi = true;
}