diff options
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/addrlib/addrinterface.h | 13 | ||||
| -rw-r--r-- | src/amd/addrlib/core/addrlib.cpp | 1 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/ciaddrlib.cpp | 51 |
3 files changed, 50 insertions, 15 deletions
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index d9a2b82c043..d05c6ef08db 100644 --- a/src/amd/addrlib/addrinterface.h +++ b/src/amd/addrlib/addrinterface.h @@ -534,9 +534,16 @@ typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT INT_32 tileIndex; ///< Tile index, MAY be "downgraded" INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - /// Special information to work around SI mipmap swizzle bug UBTS #317508 - BOOL_32 last2DLevel; ///< TRUE if this is the last 2D(3D) tiled - ///< Only meaningful when create flag checkLast2DLevel is set + /// Output flags + struct + { + /// Special information to work around SI mipmap swizzle bug UBTS #317508 + UINT_32 last2DLevel : 1; ///< TRUE if this is the last 2D(3D) tiled + ///< Only meaningful when create flag checkLast2DLevel is set + UINT_32 tcCompatible : 1; ///< If the surface can be shader compatible + UINT_32 reserved :30; ///< Reserved bits + }; + /// Stereo info ADDR_QBSTEREOINFO* pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE } ADDR_COMPUTE_SURFACE_INFO_OUTPUT; diff --git a/src/amd/addrlib/core/addrlib.cpp b/src/amd/addrlib/core/addrlib.cpp index b829eec474b..8cf4a245229 100644 --- a/src/amd/addrlib/core/addrlib.cpp +++ b/src/amd/addrlib/core/addrlib.cpp @@ -449,6 +449,7 @@ ADDR_E_RETURNCODE AddrLib::ComputeSurfaceInfo( pOut->pixelBits = localIn.bpp; pOut->numSamples = localIn.numSamples; pOut->last2DLevel = FALSE; + pOut->tcCompatible = FALSE; #if !ALT_TEST if (localIn.numSamples > 1) diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 5f8a1fee527..1024ff24549 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -483,7 +483,8 @@ INT_32 CiAddrLib::HwlPostCheckTileIndex( // tileSplitBytes stored in m_tileTable is only valid for depth entries if (type == ADDR_DEPTH_SAMPLE_ORDER) { - if (pInfo->tileSplitBytes == m_tileTable[index].info.tileSplitBytes) + if (Min(m_tileTable[index].info.tileSplitBytes, + m_rowSize) == pInfo->tileSplitBytes) { break; } @@ -621,6 +622,9 @@ ADDR_E_RETURNCODE CiAddrLib::HwlComputeSurfaceInfo( pOut->macroModeIndex = TileIndexInvalid; } + // Pass tcCompatible flag from input to output; and turn off it if tile split occurs + pOut->tcCompatible = pIn->flags.tcCompatible; + ADDR_E_RETURNCODE retCode = SiAddrLib::HwlComputeSurfaceInfo(pIn,pOut); if (pOut->macroModeIndex == TileIndexNoMacroIndex) @@ -1010,11 +1014,18 @@ VOID CiAddrLib::HwlSetupTileInfo( // See table entries 0-4 if (flags.depth || flags.stencil) { - if (flags.depth && (flags.nonSplit || flags.tcCompatible)) + // tileSize = thickness * bpp * numSamples * 8 * 8 / 8 + UINT_32 tileSize = thickness * bpp * numSamples * 8; + + // Turn off tc compatible if row_size is smaller than tile size (tile split occurs). + if (m_rowSize < tileSize) { - // tileSize = bpp * numSamples * 8 * 8 / 8 - UINT_32 tileSize = bpp * numSamples * 8; + flags.tcCompatible = FALSE; + pOut->tcCompatible = FALSE; + } + if (flags.depth && (flags.nonSplit || flags.tcCompatible)) + { // Texure readable depth surface should not be split switch (tileSize) { @@ -1215,6 +1226,29 @@ VOID CiAddrLib::HwlSetupTileInfo( pOut->tileIndex = 8; *pTileInfo = m_tileTable[8].info; } + + // Turn off tcCompatible for color surface if tileSplit happens. Depth/stencil is + // handled at tileIndex selecting time. + if (pOut->tcCompatible && (inTileType != ADDR_DEPTH_SAMPLE_ORDER)) + { + if (IsMacroTiled(tileMode)) + { + // Non-depth entries store a split factor + UINT_32 sampleSplit = m_tileTable[pOut->tileIndex].info.tileSplitBytes; + UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness); + UINT_32 colorTileSplit = Max(256u, sampleSplit * tileBytes1x); + + if (m_rowSize < colorTileSplit) + { + pOut->tcCompatible = FALSE; + } + } + else + { + // Client should not enable tc compatible for linear and 1D tile modes. + pOut->tcCompatible = FALSE; + } + } } /** @@ -1517,14 +1551,7 @@ INT_32 CiAddrLib::HwlComputeMacroModeIndex( pTileInfo->pipeConfig = m_tileTable[tileIndex].info.pipeConfig; - if (m_tileTable[tileIndex].type != ADDR_DEPTH_SAMPLE_ORDER) - { - pTileInfo->tileSplitBytes = tileSplitC; - } - else - { - pTileInfo->tileSplitBytes = m_tileTable[tileIndex].info.tileSplitBytes; - } + pTileInfo->tileSplitBytes = tileSplitC; } if (NULL != pTileMode) |