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-rw-r--r--src/amd/vulkan/radv_device.c5
-rw-r--r--src/amd/vulkan/radv_private.h6
2 files changed, 8 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 833f0eed135..73a7abed953 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3255,8 +3255,7 @@ radv_initialise_ds_surface(struct radv_device *device,
ds->db_depth_size = S_02801C_X_MAX(iview->image->info.width - 1) |
S_02801C_Y_MAX(iview->image->info.height - 1);
- /* Only use HTILE for the first level. */
- if (iview->image->surface.htile_size && !level) {
+ if (radv_htile_enabled(iview->image, level)) {
ds->db_z_info |= S_028038_TILE_SURFACE_ENABLE(1);
if (iview->image->tc_compatible_htile) {
@@ -3331,7 +3330,7 @@ radv_initialise_ds_surface(struct radv_device *device,
S_028058_HEIGHT_TILE_MAX((level_info->nblk_y / 8) - 1);
ds->db_depth_slice = S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1);
- if (iview->image->surface.htile_size && !level) {
+ if (radv_htile_enabled(iview->image, level)) {
ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1);
if (!iview->image->surface.has_stencil &&
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index c2d78a7e2c7..2405d983394 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1253,6 +1253,12 @@ radv_vi_dcc_enabled(const struct radv_image *image, unsigned level)
return image->surface.dcc_size && level < image->surface.num_dcc_levels;
}
+static inline bool
+radv_htile_enabled(const struct radv_image *image, unsigned level)
+{
+ return image->surface.htile_size && level == 0;
+}
+
unsigned radv_image_queue_family_mask(const struct radv_image *image, uint32_t family, uint32_t queue_family);
static inline uint32_t