diff options
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/addrlib/addrinterface.h | 3 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/ciaddrlib.cpp | 25 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/siaddrlib.h | 4 |
3 files changed, 28 insertions, 4 deletions
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index 55f3ebc3f43..a2a36cd1173 100644 --- a/src/amd/addrlib/addrinterface.h +++ b/src/amd/addrlib/addrinterface.h @@ -609,7 +609,8 @@ typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT UINT_32 last2DLevel : 1; ///< TRUE if this is the last 2D(3D) tiled ///< Only meaningful when create flag checkLast2DLevel is set UINT_32 tcCompatible : 1; ///< If the surface can be shader compatible - UINT_32 reserved :30; ///< Reserved bits + UINT_32 dccUnsupport : 1; ///< If the surface can support DCC compressed rendering + UINT_32 reserved :29; ///< Reserved bits }; UINT_32 equationIndex; ///< Equation index in the equation table; diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index e5dfea2902b..ed7958d3223 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -1384,6 +1384,9 @@ VOID CiLib::HwlSetupTileInfo( tileInfo.bankWidth * tileInfo.bankHeight; ADDR_ASSERT(macroTileBytes == PrtTileBytes); + + pOut->tcCompatible = FALSE; + pOut->dccUnsupport = TRUE; } } } @@ -1396,10 +1399,30 @@ VOID CiLib::HwlSetupTileInfo( // pass tile type back for post tile index compute pOut->tileType = inTileType; + + if (flags.depth || flags.stencil) + { + // tileSize = thickness * bpp * numSamples * 8 * 8 / 8 + UINT_32 tileSize = thickness * bpp * numSamples * 8; + + // Turn off tc compatible if row_size is smaller than tile size (tile split occurs). + if (m_rowSize < tileSize) + { + flags.tcCompatible = FALSE; + pOut->tcCompatible = FALSE; + } + } + + UINT_32 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); + + if (m_pipes != numPipes) + { + pOut->dccUnsupport = TRUE; + } } // We only need to set up tile info if there is a valid index but macroModeIndex is invalid - if (index != TileIndexInvalid && macroModeIndex == TileIndexInvalid) + if ((index != TileIndexInvalid) && (macroModeIndex == TileIndexInvalid)) { macroModeIndex = HwlComputeMacroModeIndex(index, flags, bpp, numSamples, pTileInfo); diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h index c40b5460b4f..80c5cf4079f 100644 --- a/src/amd/addrlib/r800/siaddrlib.h +++ b/src/amd/addrlib/r800/siaddrlib.h @@ -277,6 +277,8 @@ protected: // Initialize equation table VOID InitEquationTable(); + UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const; + static const UINT_32 TileTableSize = 32; TileConfig m_tileTable[TileTableSize]; UINT_32 m_noOfEntries; @@ -297,8 +299,6 @@ protected: private: - UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const; - VOID ReadGbTileMode(UINT_32 regValue, TileConfig* pCfg) const; BOOL_32 InitTileSettingTable(const UINT_32 *pSetting, UINT_32 noOfEntries); |