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-rw-r--r--src/amd/vulkan/radv_image.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index b145e81f826..ee03a1dc6a9 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -806,6 +806,16 @@ radv_image_alloc_htile(struct radv_image *image)
static inline bool
radv_image_can_enable_dcc_or_cmask(struct radv_image *image)
{
+ if (image->info.samples <= 1 &&
+ image->info.width <= 512 && image->info.height <= 512) {
+ /* Do not enable CMASK or DCC for small surfaces where the cost
+ * of the eliminate pass can be higher than the benefit of fast
+ * clear. RadeonSI does this, but the image threshold is
+ * different.
+ */
+ return false;
+ }
+
return image->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT &&
(image->exclusive || image->queue_family_mask == 1);
}