diff options
Diffstat (limited to 'src/amd/vulkan/winsys')
4 files changed, 5 insertions, 158 deletions
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c index 3a682c674c6..508a6d1f733 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c @@ -37,18 +37,6 @@ #include "ac_surface.h" -#ifndef NO_ENTRIES -#define NO_ENTRIES 32 -#endif - -#ifndef NO_MACRO_ENTRIES -#define NO_MACRO_ENTRIES 16 -#endif - -#ifndef CIASICIDGFXENGINE_SOUTHERNISLAND -#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A -#endif - static int radv_amdgpu_surface_sanity(const struct ac_surf_info *surf_info, const struct radeon_surf *surf) { @@ -103,63 +91,6 @@ static int radv_amdgpu_surface_sanity(const struct ac_surf_info *surf_info, return 0; } -static void *ADDR_API radv_allocSysMem(const ADDR_ALLOCSYSMEM_INPUT * pInput) -{ - return malloc(pInput->sizeInBytes); -} - -static ADDR_E_RETURNCODE ADDR_API radv_freeSysMem(const ADDR_FREESYSMEM_INPUT * pInput) -{ - free(pInput->pVirtAddr); - return ADDR_OK; -} - -ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id, - enum chip_class chip_class) -{ - ADDR_CREATE_INPUT addrCreateInput = {0}; - ADDR_CREATE_OUTPUT addrCreateOutput = {0}; - ADDR_REGISTER_VALUE regValue = {0}; - ADDR_CREATE_FLAGS createFlags = {{0}}; - ADDR_E_RETURNCODE addrRet; - - addrCreateInput.size = sizeof(ADDR_CREATE_INPUT); - addrCreateOutput.size = sizeof(ADDR_CREATE_OUTPUT); - - regValue.noOfBanks = amdinfo->mc_arb_ramcfg & 0x3; - regValue.gbAddrConfig = amdinfo->gb_addr_cfg; - regValue.noOfRanks = (amdinfo->mc_arb_ramcfg & 0x4) >> 2; - - regValue.backendDisables = amdinfo->backend_disable[0]; - regValue.pTileConfig = amdinfo->gb_tile_mode; - regValue.noOfEntries = ARRAY_SIZE(amdinfo->gb_tile_mode); - if (chip_class == SI) { - regValue.pMacroTileConfig = NULL; - regValue.noOfMacroEntries = 0; - } else { - regValue.pMacroTileConfig = amdinfo->gb_macro_tile_mode; - regValue.noOfMacroEntries = ARRAY_SIZE(amdinfo->gb_macro_tile_mode); - } - - createFlags.value = 0; - createFlags.useTileIndex = 1; - - addrCreateInput.chipEngine = CIASICIDGFXENGINE_SOUTHERNISLAND; - addrCreateInput.chipFamily = family; - addrCreateInput.chipRevision = rev_id; - addrCreateInput.createFlags = createFlags; - addrCreateInput.callbacks.allocSysMem = radv_allocSysMem; - addrCreateInput.callbacks.freeSysMem = radv_freeSysMem; - addrCreateInput.callbacks.debugPrint = 0; - addrCreateInput.regValue = regValue; - - addrRet = AddrCreate(&addrCreateInput, &addrCreateOutput); - if (addrRet != ADDR_OK) - return NULL; - - return addrCreateOutput.hLib; -} - static int radv_compute_level(ADDR_HANDLE addrlib, const struct ac_surf_info *surf_info, struct radeon_surf *surf, bool is_stencil, diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h index cdc8c81e427..a5652a32570 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h @@ -28,6 +28,5 @@ #include <amdgpu.h> void radv_amdgpu_surface_init_functions(struct radv_amdgpu_winsys *ws); -ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id, enum chip_class chip_class); #endif /* RADV_AMDGPU_SURFACE_H */ diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c index 31b0db97636..94fd8b84e00 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c @@ -29,6 +29,7 @@ #include "radv_amdgpu_surface.h" #include "radv_debug.h" #include "amdgpu_id.h" +#include "ac_surface.h" #include "xf86drm.h" #include <stdio.h> #include <stdlib.h> @@ -43,96 +44,17 @@ static bool do_winsys_init(struct radv_amdgpu_winsys *ws, int fd) { if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo)) - goto fail; + return false; if (ws->info.chip_class >= GFX9) { fprintf(stderr, "radv: GFX9 is not supported.\n"); - goto fail; + return false; } - /* family and rev_id are for addrlib */ - switch (ws->info.family) { - case CHIP_TAHITI: - ws->family = FAMILY_SI; - ws->rev_id = SI_TAHITI_P_A0; - break; - case CHIP_PITCAIRN: - ws->family = FAMILY_SI; - ws->rev_id = SI_PITCAIRN_PM_A0; - break; - case CHIP_VERDE: - ws->family = FAMILY_SI; - ws->rev_id = SI_CAPEVERDE_M_A0; - break; - case CHIP_OLAND: - ws->family = FAMILY_SI; - ws->rev_id = SI_OLAND_M_A0; - break; - case CHIP_HAINAN: - ws->family = FAMILY_SI; - ws->rev_id = SI_HAINAN_V_A0; - break; - case CHIP_BONAIRE: - ws->family = FAMILY_CI; - ws->rev_id = CI_BONAIRE_M_A0; - break; - case CHIP_KAVERI: - ws->family = FAMILY_KV; - ws->rev_id = KV_SPECTRE_A0; - break; - case CHIP_KABINI: - ws->family = FAMILY_KV; - ws->rev_id = KB_KALINDI_A0; - break; - case CHIP_HAWAII: - ws->family = FAMILY_CI; - ws->rev_id = CI_HAWAII_P_A0; - break; - case CHIP_MULLINS: - ws->family = FAMILY_KV; - ws->rev_id = ML_GODAVARI_A0; - break; - case CHIP_TONGA: - ws->family = FAMILY_VI; - ws->rev_id = VI_TONGA_P_A0; - break; - case CHIP_ICELAND: - ws->family = FAMILY_VI; - ws->rev_id = VI_ICELAND_M_A0; - break; - case CHIP_CARRIZO: - ws->family = FAMILY_CZ; - ws->rev_id = CARRIZO_A0; - break; - case CHIP_STONEY: - ws->family = FAMILY_CZ; - ws->rev_id = STONEY_A0; - break; - case CHIP_FIJI: - ws->family = FAMILY_VI; - ws->rev_id = VI_FIJI_P_A0; - break; - case CHIP_POLARIS10: - ws->family = FAMILY_VI; - ws->rev_id = VI_POLARIS10_P_A0; - break; - case CHIP_POLARIS11: - ws->family = FAMILY_VI; - ws->rev_id = VI_POLARIS11_M_A0; - break; - case CHIP_POLARIS12: - ws->family = FAMILY_VI; - ws->rev_id = VI_POLARIS12_V_A0; - break; - default: - fprintf(stderr, "amdgpu: Unknown family.\n"); - goto fail; - } - - ws->addrlib = radv_amdgpu_addr_create(&ws->amdinfo, ws->family, ws->rev_id, ws->info.chip_class); + ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo); if (!ws->addrlib) { fprintf(stderr, "amdgpu: Cannot create addrlib.\n"); - goto fail; + return false; } ws->info.num_sdma_rings = MIN2(ws->info.num_sdma_rings, MAX_RINGS_PER_TYPE); @@ -140,8 +62,6 @@ do_winsys_init(struct radv_amdgpu_winsys *ws, int fd) ws->use_ib_bos = ws->info.chip_class >= CIK; return true; -fail: - return false; } static void radv_amdgpu_winsys_query_info(struct radeon_winsys *rws, diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h index 93f4c2cce33..59e2730b124 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h @@ -42,9 +42,6 @@ struct radv_amdgpu_winsys { struct amdgpu_gpu_info amdinfo; ADDR_HANDLE addrlib; - uint32_t rev_id; - unsigned family; - bool debug_all_bos; pthread_mutex_t global_bo_list_lock; struct list_head global_bo_list; |