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-rw-r--r--src/amd/vulkan/radv_image.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 6e5f3e7ad0b..dd3189c67d0 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -91,18 +91,14 @@ radv_image_is_tc_compat_htile(struct radv_device *device,
pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT)
return false;
- if (device->physical_device->rad_info.chip_class >= GFX9) {
- /* GFX9 supports both 32-bit and 16-bit depth surfaces. */
- if (pCreateInfo->format != VK_FORMAT_D32_SFLOAT_S8_UINT &&
- pCreateInfo->format != VK_FORMAT_D32_SFLOAT &&
- pCreateInfo->format != VK_FORMAT_D16_UNORM)
- return false;
- } else {
- /* GFX8 only supports 32-bit depth surfaces. */
- if (pCreateInfo->format != VK_FORMAT_D32_SFLOAT_S8_UINT &&
- pCreateInfo->format != VK_FORMAT_D32_SFLOAT)
- return false;
- }
+ /* GFX9 supports both 32-bit and 16-bit depth surfaces, while GFX8 only
+ * supports 32-bit. Though, it's possible to enable TC-compat for
+ * 16-bit depth surfaces if no Z planes are compressed.
+ */
+ if (pCreateInfo->format != VK_FORMAT_D32_SFLOAT_S8_UINT &&
+ pCreateInfo->format != VK_FORMAT_D32_SFLOAT &&
+ pCreateInfo->format != VK_FORMAT_D16_UNORM)
+ return false;
return true;
}