summaryrefslogtreecommitdiffstats
path: root/src/amd/common
diff options
context:
space:
mode:
Diffstat (limited to 'src/amd/common')
-rw-r--r--src/amd/common/ac_surface.c4
-rw-r--r--src/amd/common/ac_surface.h2
2 files changed, 5 insertions, 1 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 9cc2b932830..92aab57920a 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -1062,8 +1062,10 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib,
surf->surf_alignment = out.baseAlign;
if (in->swizzleMode == ADDR_SW_LINEAR) {
- for (unsigned i = 0; i < in->numMipLevels; i++)
+ for (unsigned i = 0; i < in->numMipLevels; i++) {
surf->u.gfx9.offset[i] = mip_info[i].offset;
+ surf->u.gfx9.pitch[i] = mip_info[i].pitch;
+ }
}
if (in->flags.depth) {
diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h
index c838bd47da5..1e90c08b2e5 100644
--- a/src/amd/common/ac_surface.h
+++ b/src/amd/common/ac_surface.h
@@ -154,6 +154,8 @@ struct gfx9_surf_layout {
uint64_t surf_slice_size;
/* Mipmap level offset within the slice in bytes. Only valid for LINEAR. */
uint32_t offset[RADEON_SURF_MAX_LEVELS];
+ /* Mipmap level pitch in elements. Only valid for LINEAR. */
+ uint32_t pitch[RADEON_SURF_MAX_LEVELS];
uint64_t stencil_offset; /* separate stencil */