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-rw-r--r--src/amd/common/ac_gpu_info.c2
-rw-r--r--src/amd/common/ac_gpu_info.h1
2 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index f05dd77a21e..1c7abdb87cb 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -323,6 +323,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->has_gpu_reset_status_query = true;
info->has_gpu_reset_counter_query = false;
info->has_eqaa_surface_allocator = true;
+ info->has_format_bc1_through_bc7 = true;
info->num_render_backends = amdinfo->rb_pipes;
/* The value returned by the kernel driver was wrong. */
@@ -477,6 +478,7 @@ void ac_print_gpu_info(struct radeon_info *info)
printf(" has_gpu_reset_status_query = %u\n", info->has_gpu_reset_status_query);
printf(" has_gpu_reset_counter_query = %u\n", info->has_gpu_reset_counter_query);
printf(" has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator);
+ printf(" has_format_bc1_through_bc7 = %u\n", info->has_format_bc1_through_bc7);
printf("Shader core info:\n");
printf(" max_shader_clock = %i\n", info->max_shader_clock);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index f8e4adf0d41..9c4c6cb11f0 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -103,6 +103,7 @@ struct radeon_info {
bool has_gpu_reset_status_query;
bool has_gpu_reset_counter_query;
bool has_eqaa_surface_allocator;
+ bool has_format_bc1_through_bc7;
/* Shader cores. */
uint32_t r600_max_quad_pipes; /* wave size / 16 */