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-rw-r--r--src/amd/common/ac_gpu_info.c2
-rw-r--r--src/amd/common/ac_gpu_info.h1
2 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 6f2fea895be..68750b2db28 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -319,6 +319,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->kernel_flushes_hdp_before_ib = true;
info->htile_cmask_support_1d_tiling = true;
info->si_TA_CS_BC_BASE_ADDR_allowed = true;
+ info->has_bo_metadata = true;
info->num_render_backends = amdinfo->rb_pipes;
/* The value returned by the kernel driver was wrong. */
@@ -469,6 +470,7 @@ void ac_print_gpu_info(struct radeon_info *info)
printf(" kernel_flushes_hdp_before_ib = %u\n", info->kernel_flushes_hdp_before_ib);
printf(" htile_cmask_support_1d_tiling = %u\n", info->htile_cmask_support_1d_tiling);
printf(" si_TA_CS_BC_BASE_ADDR_allowed = %u\n", info->si_TA_CS_BC_BASE_ADDR_allowed);
+ printf(" has_bo_metadata = %u\n", info->has_bo_metadata);
printf("Shader core info:\n");
printf(" max_shader_clock = %i\n", info->max_shader_clock);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index bc6350b5625..340c368bda3 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -99,6 +99,7 @@ struct radeon_info {
bool kernel_flushes_hdp_before_ib;
bool htile_cmask_support_1d_tiling;
bool si_TA_CS_BC_BASE_ADDR_allowed;
+ bool has_bo_metadata;
/* Shader cores. */
uint32_t r600_max_quad_pipes; /* wave size / 16 */