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-rw-r--r--src/amd/addrlib/addrinterface.h2
-rw-r--r--src/amd/addrlib/core/addrlib1.cpp16
2 files changed, 18 insertions, 0 deletions
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h
index 8506a45ae90..d2d6d94698e 100644
--- a/src/amd/addrlib/addrinterface.h
+++ b/src/amd/addrlib/addrinterface.h
@@ -906,6 +906,8 @@ typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT
UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape
UINT_32 macroHeight; ///< Macro height in pixels
UINT_64 sliceSize; ///< Slice size, in bytes.
+ BOOL_32 sliceInterleaved; ///< Flag to indicate if different slice's htile is interleaved
+ /// Compute engine clear can't be used if htile is interleaved
} ADDR_COMPUTE_HTILE_INFO_OUTPUT;
/**
diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp
index fb33145f88d..809bca23914 100644
--- a/src/amd/addrlib/core/addrlib1.cpp
+++ b/src/amd/addrlib/core/addrlib1.cpp
@@ -1295,6 +1295,22 @@ ADDR_E_RETURNCODE Lib::ComputeHtileInfo(
&pOut->macroHeight,
&pOut->sliceSize,
&pOut->baseAlign);
+
+ if (pIn->flags.tcCompatible && (pIn->numSlices > 1))
+ {
+ pOut->sliceSize = pIn->pitch * pIn->height * 4 / (8 * 8);
+
+ const UINT_32 align = HwlGetPipes(pIn->pTileInfo) * pIn->pTileInfo->banks * m_pipeInterleaveBytes;
+
+ if ((pOut->sliceSize % align) == 0)
+ {
+ pOut->sliceInterleaved = FALSE;
+ }
+ else
+ {
+ pOut->sliceInterleaved = TRUE;
+ }
+ }
}
}