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-rw-r--r--src/amd/addrlib/core/addrcommon.h9
-rw-r--r--src/amd/addrlib/core/addrelemlib.h4
-rw-r--r--src/amd/addrlib/core/addrlib.h2
-rw-r--r--src/amd/addrlib/core/addrlib1.cpp16
-rw-r--r--src/amd/addrlib/core/addrlib1.h2
5 files changed, 16 insertions, 17 deletions
diff --git a/src/amd/addrlib/core/addrcommon.h b/src/amd/addrlib/core/addrcommon.h
index 9902eb14297..8199f76e502 100644
--- a/src/amd/addrlib/core/addrcommon.h
+++ b/src/amd/addrlib/core/addrcommon.h
@@ -111,18 +111,17 @@ enum AddrChipFamily
/**
***************************************************************************************************
-* ADDR_CONFIG_FLAGS
+* AddrConfigFlags
*
* @brief
-* This structure is used to set addr configuration flags.
+* This structure is used to set configuration flags.
***************************************************************************************************
*/
-union ADDR_CONFIG_FLAGS
+union AddrConfigFlags
{
struct
{
- /// Clients do not need to set these flags except forceLinearAligned.
- /// There flags are set up by AddrLib inside thru AddrInitGlobalParamsFromRegister
+ /// These flags are set up internally thru AddrLib::Create() based on ADDR_CREATE_FLAGS
UINT_32 optimalBankSwap : 1; ///< New bank tiling for RV770 only
UINT_32 noCubeMipSlicesPad : 1; ///< Disables faces padding for cubemap mipmaps
UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and
diff --git a/src/amd/addrlib/core/addrelemlib.h b/src/amd/addrlib/core/addrelemlib.h
index c302b3b1788..68dee2d4e57 100644
--- a/src/amd/addrlib/core/addrelemlib.h
+++ b/src/amd/addrlib/core/addrelemlib.h
@@ -231,7 +231,7 @@ public:
}
/// Sets m_configFlags, copied from AddrLib
- VOID SetConfigFlags(ADDR_CONFIG_FLAGS flags)
+ VOID SetConfigFlags(AddrConfigFlags flags)
{
m_configFlags = flags;
}
@@ -262,7 +262,7 @@ private:
UINT_32 m_fp16ExportNorm; ///< If allow FP16 to be reported as EXPORT_NORM
AddrDepthPlanarType m_depthPlanarType;
- ADDR_CONFIG_FLAGS m_configFlags; ///< Copy of AddrLib's configFlags
+ AddrConfigFlags m_configFlags; ///< Copy of AddrLib's configFlags
AddrLib* const m_pAddrLib; ///< Pointer to parent addrlib instance
};
diff --git a/src/amd/addrlib/core/addrlib.h b/src/amd/addrlib/core/addrlib.h
index 4ba7c2d415f..9e46a829500 100644
--- a/src/amd/addrlib/core/addrlib.h
+++ b/src/amd/addrlib/core/addrlib.h
@@ -249,7 +249,7 @@ protected:
//
// Global parameters
//
- ADDR_CONFIG_FLAGS m_configFlags; ///< Global configuration flags. Note this is setup by
+ AddrConfigFlags m_configFlags; ///< Global configuration flags. Note this is setup by
/// AddrLib instead of Client except forceLinearAligned
UINT_32 m_pipes; ///< Number of pipes
diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp
index 0be7bc143f3..5e68f27f418 100644
--- a/src/amd/addrlib/core/addrlib1.cpp
+++ b/src/amd/addrlib/core/addrlib1.cpp
@@ -40,7 +40,7 @@
// Static Const Member
///////////////////////////////////////////////////////////////////////////////////////////////////
-const AddrTileModeFlags AddrLib1::m_modeFlags[ADDR_TM_COUNT] =
+const AddrTileModeFlags AddrLib1::ModeFlags[ADDR_TM_COUNT] =
{// T L 1 2 3 P Pr B
{1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_GENERAL
{1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_ALIGNED
@@ -1211,7 +1211,7 @@ ADDR_E_RETURNCODE AddrLib1::GetTileIndex(
UINT_32 AddrLib1::Thickness(
AddrTileMode tileMode) ///< [in] tile mode
{
- return m_modeFlags[tileMode].thickness;
+ return ModeFlags[tileMode].thickness;
}
@@ -3370,7 +3370,7 @@ UINT_32 AddrLib1::HwlPostHandleBaseLvl3xPitch(
BOOL_32 AddrLib1::IsMacroTiled(
AddrTileMode tileMode) ///< [in] tile mode
{
- return m_modeFlags[tileMode].isMacro;
+ return ModeFlags[tileMode].isMacro;
}
/**
@@ -3387,7 +3387,7 @@ BOOL_32 AddrLib1::IsMacroTiled(
BOOL_32 AddrLib1::IsMacro3dTiled(
AddrTileMode tileMode) ///< [in] tile mode
{
- return m_modeFlags[tileMode].isMacro3d;
+ return ModeFlags[tileMode].isMacro3d;
}
/**
@@ -3404,7 +3404,7 @@ BOOL_32 AddrLib1::IsMacro3dTiled(
BOOL_32 AddrLib1::IsMicroTiled(
AddrTileMode tileMode) ///< [in] tile mode
{
- return m_modeFlags[tileMode].isMicro;
+ return ModeFlags[tileMode].isMicro;
}
/**
@@ -3421,7 +3421,7 @@ BOOL_32 AddrLib1::IsMicroTiled(
BOOL_32 AddrLib1::IsLinear(
AddrTileMode tileMode) ///< [in] tile mode
{
- return m_modeFlags[tileMode].isLinear;
+ return ModeFlags[tileMode].isLinear;
}
/**
@@ -3437,7 +3437,7 @@ BOOL_32 AddrLib1::IsLinear(
BOOL_32 AddrLib1::IsPrtNoRotationTileMode(
AddrTileMode tileMode)
{
- return m_modeFlags[tileMode].isPrtNoRotation;
+ return ModeFlags[tileMode].isPrtNoRotation;
}
/**
@@ -3453,7 +3453,7 @@ BOOL_32 AddrLib1::IsPrtNoRotationTileMode(
BOOL_32 AddrLib1::IsPrtTileMode(
AddrTileMode tileMode)
{
- return m_modeFlags[tileMode].isPrt;
+ return ModeFlags[tileMode].isPrt;
}
/**
diff --git a/src/amd/addrlib/core/addrlib1.h b/src/amd/addrlib/core/addrlib1.h
index a852ac25bda..6ca58260cc8 100644
--- a/src/amd/addrlib/core/addrlib1.h
+++ b/src/amd/addrlib/core/addrlib1.h
@@ -429,7 +429,7 @@ protected:
//
// Misc helper
//
- static const AddrTileModeFlags m_modeFlags[ADDR_TM_COUNT];
+ static const AddrTileModeFlags ModeFlags[ADDR_TM_COUNT];
static UINT_32 Thickness(
AddrTileMode tileMode);