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-rw-r--r--src/amd/addrlib/r800/ciaddrlib.cpp96
-rw-r--r--src/amd/addrlib/r800/ciaddrlib.h2
-rw-r--r--src/amd/addrlib/r800/siaddrlib.cpp76
-rw-r--r--src/amd/addrlib/r800/siaddrlib.h2
4 files changed, 176 insertions, 0 deletions
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp
index f88741e84d1..15aff1652a4 100644
--- a/src/amd/addrlib/r800/ciaddrlib.cpp
+++ b/src/amd/addrlib/r800/ciaddrlib.cpp
@@ -1024,6 +1024,102 @@ VOID CiAddrLib::HwlOverrideTileMode(
/**
***************************************************************************************************
+* CiAddrLib::HwlSelectTileMode
+*
+* @brief
+* Select tile modes.
+*
+* @return
+* N/A
+*
+***************************************************************************************************
+*/
+VOID CiAddrLib::HwlSelectTileMode(
+ ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in/out] input output structure
+ ) const
+{
+ AddrTileMode tileMode;
+ AddrTileType tileType;
+
+ if (pInOut->flags.rotateDisplay)
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ tileType = ADDR_ROTATED;
+ }
+ else if (pInOut->flags.volume)
+ {
+ BOOL_32 bThin = (m_settings.isBonaire == TRUE) ||
+ ((m_allowNonDispThickModes == TRUE) && (pInOut->flags.color == TRUE));
+
+ if (pInOut->numSlices >= 8)
+ {
+ tileMode = ADDR_TM_2D_TILED_XTHICK;
+ tileType = (bThin == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK;
+ }
+ else if (pInOut->numSlices >= 4)
+ {
+ tileMode = ADDR_TM_2D_TILED_THICK;
+ tileType = (bThin == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK;
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+
+ if (pInOut->flags.depth || pInOut->flags.stencil)
+ {
+ tileType = ADDR_DEPTH_SAMPLE_ORDER;
+ }
+ else if ((pInOut->bpp <= 32) ||
+ (pInOut->flags.display == TRUE) ||
+ (pInOut->flags.overlay == TRUE))
+ {
+ tileType = ADDR_DISPLAYABLE;
+ }
+ else
+ {
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ }
+
+ if (pInOut->flags.prt)
+ {
+ if (Thickness(tileMode) > 1)
+ {
+ tileMode = ADDR_TM_PRT_TILED_THICK;
+ tileType = (m_settings.isBonaire == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK;
+ }
+ else
+ {
+ tileMode = ADDR_TM_PRT_TILED_THIN1;
+ }
+ }
+
+ pInOut->tileMode = tileMode;
+ pInOut->tileType = tileType;
+
+ if ((pInOut->flags.dccCompatible == FALSE) &&
+ (pInOut->flags.tcCompatible == FALSE))
+ {
+ pInOut->flags.opt4Space = TRUE;
+
+ // Optimize tile mode if possible
+ if (OptimizeTileMode(pInOut, &tileMode))
+ {
+ pInOut->tileMode = tileMode;
+ }
+ }
+
+ HwlOverrideTileMode(pInOut);
+}
+
+/**
+***************************************************************************************************
* CiAddrLib::HwlSetupTileInfo
*
* @brief
diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h
index e959df39231..12587cd06c5 100644
--- a/src/amd/addrlib/r800/ciaddrlib.h
+++ b/src/amd/addrlib/r800/ciaddrlib.h
@@ -143,6 +143,8 @@ protected:
virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+ virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+
virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp
index 4822d77a4c2..30f99349a1b 100644
--- a/src/amd/addrlib/r800/siaddrlib.cpp
+++ b/src/amd/addrlib/r800/siaddrlib.cpp
@@ -3199,6 +3199,82 @@ void SiAddrLib::HwlOverrideTileMode(
/**
***************************************************************************************************
+* SiAddrLib::HwlSelectTileMode
+*
+* @brief
+* Select tile modes.
+*
+* @return
+* N/A
+*
+***************************************************************************************************
+*/
+VOID SiAddrLib::HwlSelectTileMode(
+ ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in/out] input output structure
+ ) const
+{
+ AddrTileMode tileMode;
+ AddrTileType tileType;
+
+ if (pInOut->flags.volume)
+ {
+ if (pInOut->numSlices >= 8)
+ {
+ tileMode = ADDR_TM_2D_TILED_XTHICK;
+ }
+ else if (pInOut->numSlices >= 4)
+ {
+ tileMode = ADDR_TM_2D_TILED_THICK;
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ }
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+
+ if (pInOut->flags.depth || pInOut->flags.stencil)
+ {
+ tileType = ADDR_DEPTH_SAMPLE_ORDER;
+ }
+ else if ((pInOut->bpp <= 32) ||
+ (pInOut->flags.display == TRUE) ||
+ (pInOut->flags.overlay == TRUE))
+ {
+ tileType = ADDR_DISPLAYABLE;
+ }
+ else
+ {
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ }
+
+ if (pInOut->flags.prt)
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ tileType = (tileType == ADDR_DISPLAYABLE) ? ADDR_NON_DISPLAYABLE : tileType;
+ }
+
+ pInOut->tileMode = tileMode;
+ pInOut->tileType = tileType;
+
+ // Optimize tile mode if possible
+ pInOut->flags.opt4Space = TRUE;
+
+ // Optimize tile mode if possible
+ if (OptimizeTileMode(pInOut, &tileMode))
+ {
+ pInOut->tileMode = tileMode;
+ }
+
+ HwlOverrideTileMode(pInOut);
+}
+
+/**
+***************************************************************************************************
* SiAddrLib::HwlGetMaxAlignments
*
* @brief
diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h
index 814cd0095db..7619cfec3ee 100644
--- a/src/amd/addrlib/r800/siaddrlib.h
+++ b/src/amd/addrlib/r800/siaddrlib.h
@@ -183,6 +183,8 @@ protected:
virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+ virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+
virtual BOOL_32 HwlSanityCheckMacroTiled(
ADDR_TILEINFO* pTileInfo) const
{