diff options
Diffstat (limited to 'src/amd/addrlib/r800')
| -rw-r--r-- | src/amd/addrlib/r800/ciaddrlib.cpp | 39 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/ciaddrlib.h | 2 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/siaddrlib.cpp | 1 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/siaddrlib.h | 2 |
4 files changed, 30 insertions, 14 deletions
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 64fa66941ff..f72f5a26935 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -542,6 +542,7 @@ INT_32 CiAddrLib::HwlPostCheckTileIndex( *************************************************************************************************** */ ADDR_E_RETURNCODE CiAddrLib::HwlSetupTileCfg( + UINT_32 bpp, ///< [in] Bits per pixel INT_32 index, ///< [in] Tile index INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) ADDR_TILEINFO* pInfo, ///< [out] Tile Info @@ -566,23 +567,37 @@ ADDR_E_RETURNCODE CiAddrLib::HwlSetupTileCfg( { if (IsMacroTiled(pCfgTable->mode)) { - ADDR_ASSERT(((macroModeIndex != TileIndexInvalid) - && (macroModeIndex != TileIndexNoMacroIndex))); - // Here we used tile_bytes to replace of tile_split - // According info as below: - // "tile_split_c = MIN(ROW_SIZE, tile_split) - // "tile_bytes = MIN(tile_split_c, num_samples * tile_bytes_1x) - // when using tile_bytes replacing of tile_split, the result of - // alignment and others(such as slicesPerTile) are unaffected - - // since if tile_split_c is larger, split won't happen, otherwise - // (num_samples * tile_bytes_1x is larger), a correct tile_split is - // returned. + ADDR_ASSERT((macroModeIndex != TileIndexInvalid) && + (macroModeIndex != TileIndexNoMacroIndex)); + + UINT_32 tileSplit; + *pInfo = m_macroTileTable[macroModeIndex]; if (pCfgTable->type == ADDR_DEPTH_SAMPLE_ORDER) { - pInfo->tileSplitBytes = pCfgTable->info.tileSplitBytes; + tileSplit = pCfgTable->info.tileSplitBytes; } + else + { + if (bpp > 0) + { + UINT_32 thickness = ComputeSurfaceThickness(pCfgTable->mode); + UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness); + // Non-depth entries store a split factor + UINT_32 sampleSplit = m_tileTable[index].info.tileSplitBytes; + tileSplit = Max(256u, sampleSplit * tileBytes1x); + } + else + { + // Return tileBytes instead if not enough info + tileSplit = pInfo->tileSplitBytes; + } + } + + // Clamp to row_size + pInfo->tileSplitBytes = Min(m_rowSize, tileSplit); + pInfo->pipeConfig = pCfgTable->info.pipeConfig; } else // 1D and linear modes, we return default value stored in table diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h index 92997a5b46f..1e3dc567125 100644 --- a/src/amd/addrlib/r800/ciaddrlib.h +++ b/src/amd/addrlib/r800/ciaddrlib.h @@ -105,7 +105,7 @@ protected: const ADDR_CREATE_INPUT* pCreateIn); virtual ADDR_E_RETURNCODE HwlSetupTileCfg( - INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo, + UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; virtual VOID HwlComputeTileDataWidthAndHeightLinear( diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp index 869cc56c1fe..296391ab46f 100644 --- a/src/amd/addrlib/r800/siaddrlib.cpp +++ b/src/amd/addrlib/r800/siaddrlib.cpp @@ -2443,6 +2443,7 @@ INT_32 SiAddrLib::HwlPostCheckTileIndex( *************************************************************************************************** */ ADDR_E_RETURNCODE SiAddrLib::HwlSetupTileCfg( + UINT_32 bpp, ///< [in] Bits per pixel INT_32 index, ///< [in] Tile index INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) ADDR_TILEINFO* pInfo, ///< [out] Tile Info diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h index 50373ccec75..9201fb220fd 100644 --- a/src/amd/addrlib/r800/siaddrlib.h +++ b/src/amd/addrlib/r800/siaddrlib.h @@ -120,7 +120,7 @@ protected: const ADDR_CREATE_INPUT* pCreateIn); virtual ADDR_E_RETURNCODE HwlSetupTileCfg( - INT_32 index, INT_32 macroModeIndex, + UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; virtual VOID HwlComputeTileDataWidthAndHeightLinear( |