diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 16 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 11 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 |
3 files changed, 16 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index aea985b5292..12bf0c855a6 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -185,7 +185,7 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld, * the redundant ones. */ fs_reg vec4_offset = vgrf(glsl_type::int_type); - bld.ADD(vec4_offset, varying_offset, fs_reg(const_offset & ~0xf)); + bld.ADD(vec4_offset, varying_offset, fs_reg(const_offset & ~3)); int scale = 1; if (devinfo->gen == 4 && bld.dispatch_width() == 8) { @@ -217,7 +217,7 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld, inst->mlen = 1 + bld.dispatch_width() / 8; } - bld.MOV(dst, offset(vec4_result, bld, ((const_offset & 0xf) / 4) * scale)); + bld.MOV(dst, offset(vec4_result, bld, (const_offset & 3) * scale)); } /** @@ -1939,12 +1939,10 @@ fs_visitor::demote_pull_constants() /* Generate a pull load into dst. */ if (inst->src[i].reladdr) { - fs_reg indirect = ibld.vgrf(BRW_REGISTER_TYPE_D); - ibld.MUL(indirect, *inst->src[i].reladdr, brw_imm_d(4)); VARYING_PULL_CONSTANT_LOAD(ibld, dst, surf_index, - indirect, - pull_index * 4); + *inst->src[i].reladdr, + pull_index); inst->src[i].reladdr = NULL; inst->src[i].stride = 1; } else { @@ -2980,11 +2978,13 @@ fs_visitor::lower_uniform_pull_constant_loads() continue; if (devinfo->gen >= 7) { - /* The offset arg is a vec4-aligned immediate byte offset. */ + /* The offset arg before was a vec4-aligned byte offset. We need to + * turn it into a dword offset. + */ fs_reg const_offset_reg = inst->src[1]; assert(const_offset_reg.file == IMM && const_offset_reg.type == BRW_REGISTER_TYPE_UD); - assert(const_offset_reg.fixed_hw_reg.dw1.ud % 16 == 0); + const_offset_reg.fixed_hw_reg.dw1.ud /= 4; fs_reg payload, offset; if (devinfo->gen >= 9) { diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 1230383c480..5ebbf7033d5 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -1588,13 +1588,16 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr } if (has_indirect) { - fs_reg base_offset = retype(get_nir_src(instr->src[1]), - BRW_REGISTER_TYPE_D); + /* Turn the byte offset into a dword offset. */ + fs_reg base_offset = vgrf(glsl_type::int_type); + bld.SHR(base_offset, retype(get_nir_src(instr->src[1]), + BRW_REGISTER_TYPE_D), + fs_reg(2)); - unsigned vec4_offset = instr->const_index[0]; + unsigned vec4_offset = instr->const_index[0] / 4; for (int i = 0; i < instr->num_components; i++) VARYING_PULL_CONSTANT_LOAD(bld, offset(dest, bld, i), surf_index, - base_offset, vec4_offset + i * 4); + base_offset, vec4_offset + i); } else { fs_reg packed_consts = vgrf(glsl_type::float_type); packed_consts.type = dest.type; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 53c85e9641e..b8e1f70a662 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -403,7 +403,7 @@ brw_create_constant_surface(struct brw_context *brw, uint32_t *out_offset, bool dword_pitch) { - uint32_t stride = dword_pitch ? 1 : 16; + uint32_t stride = dword_pitch ? 4 : 16; uint32_t elements = ALIGN(size, stride) / stride; brw->vtbl.emit_buffer_surface_state(brw, out_offset, bo, offset, |