diff options
| -rw-r--r-- | src/intel/isl/isl.c | 2 | ||||
| -rw-r--r-- | src/intel/vulkan/anv_batch_chain.c | 2 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 4 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 |
6 files changed, 9 insertions, 9 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 6e027277993..1b033cb6aac 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1193,7 +1193,7 @@ isl_calc_phys_total_extent_el_gen9_1d( uint32_t *array_pitch_el_rows, struct isl_extent2d *phys_total_el) { - MAYBE_UNUSED const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); + const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); assert(phys_level0_sa->height == 1); assert(phys_level0_sa->depth == 1); diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c index 114eda0336f..14321abd254 100644 --- a/src/intel/vulkan/anv_batch_chain.c +++ b/src/intel/vulkan/anv_batch_chain.c @@ -418,7 +418,7 @@ anv_batch_bo_link(struct anv_cmd_buffer *cmd_buffer, struct anv_batch_bo *next_bbo, uint32_t next_bbo_offset) { - MAYBE_UNUSED const uint32_t bb_start_offset = + const uint32_t bb_start_offset = prev_bbo->length - GEN8_MI_BATCH_BUFFER_START_length * 4; MAYBE_UNUSED const uint32_t *bb_start = prev_bbo->bo.map + bb_start_offset; diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 2045d1647cb..5b76ac61679 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -1731,7 +1731,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, assert(!urb_low_bw || cfg->n[GEN_L3P_URB] == cfg->n[GEN_L3P_SLM]); /* Minimum number of ways that can be allocated to the URB. */ - MAYBE_UNUSED const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0; + const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0; assert(cfg->n[GEN_L3P_URB] >= n0_urb); uint32_t l3sqcr1, l3cr2, l3cr3; @@ -3540,7 +3540,7 @@ void genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer) { struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline; - MAYBE_UNUSED VkResult result; + VkResult result; assert(pipeline->active_stages == VK_SHADER_STAGE_COMPUTE_BIT); diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 9796ad29df0..ebfcbb28a95 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -955,7 +955,7 @@ emit_ds_state(struct anv_pipeline *pipeline, #endif } -MAYBE_UNUSED static bool +static bool is_dual_src_blend_factor(VkBlendFactor factor) { return factor == VK_BLEND_FACTOR_SRC1_COLOR || diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index ddb418201d5..035fbb5073a 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -74,7 +74,7 @@ KSP(UNUSED struct brw_context *brw, uint32_t offset) #endif #if GEN_GEN >= 7 -MAYBE_UNUSED static void +static void emit_lrm(struct brw_context *brw, uint32_t reg, struct brw_address addr) { brw_batch_emit(brw, GENX(MI_LOAD_REGISTER_MEM), lrm) { @@ -4941,7 +4941,7 @@ has_component(mesa_format format, int i) static void genX(upload_default_color)(struct brw_context *brw, const struct gl_sampler_object *sampler, - MAYBE_UNUSED mesa_format format, GLenum base_format, + mesa_format format, GLenum base_format, bool is_integer_format, bool is_stencil_sampling, uint32_t *sdc_offset) { diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index e28ac562a15..5716c7f254c 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -1577,7 +1577,7 @@ intel_miptree_alloc_aux(struct brw_context *brw, enum isl_aux_state initial_state; uint8_t memset_value; struct isl_surf aux_surf; - MAYBE_UNUSED bool aux_surf_ok = false; + bool aux_surf_ok = false; switch (mt->aux_usage) { case ISL_AUX_USAGE_NONE: @@ -2963,7 +2963,7 @@ intel_miptree_unmap_tiled_memcpy(struct brw_context *brw, * * \return true if the format and type combination are valid */ -MAYBE_UNUSED isl_memcpy_type +isl_memcpy_type intel_miptree_get_memcpy_type(mesa_format tiledFormat, GLenum format, GLenum type, uint32_t *cpp) { |