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-rw-r--r--src/amd/compiler/aco_instruction_selection.cpp3
-rw-r--r--src/amd/compiler/aco_instruction_selection_setup.cpp3
2 files changed, 4 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 8552b06bf89..b4db7a0d66d 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -9769,7 +9769,8 @@ static void create_vs_exports(isel_context *ctx)
for (unsigned i = 0; i <= VARYING_SLOT_VAR31; ++i) {
if (i < VARYING_SLOT_VAR0 &&
i != VARYING_SLOT_LAYER &&
- i != VARYING_SLOT_PRIMITIVE_ID)
+ i != VARYING_SLOT_PRIMITIVE_ID &&
+ i != VARYING_SLOT_VIEWPORT)
continue;
export_vs_varying(ctx, i, false, NULL);
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp
index dba3bf075f1..7d404b42568 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -751,7 +751,8 @@ setup_vs_output_info(isel_context *ctx, nir_shader *nir,
uint64_t mask = ctx->output_masks[nir->info.stage];
while (mask) {
int idx = u_bit_scan64(&mask);
- if (idx >= VARYING_SLOT_VAR0 || idx == VARYING_SLOT_LAYER || idx == VARYING_SLOT_PRIMITIVE_ID ||
+ if (idx >= VARYING_SLOT_VAR0 || idx == VARYING_SLOT_LAYER ||
+ idx == VARYING_SLOT_PRIMITIVE_ID || idx == VARYING_SLOT_VIEWPORT ||
((idx == VARYING_SLOT_CLIP_DIST0 || idx == VARYING_SLOT_CLIP_DIST1) && export_clip_dists)) {
if (outinfo->vs_output_param_offset[idx] == AC_EXP_PARAM_UNDEFINED)
outinfo->vs_output_param_offset[idx] = outinfo->param_exports++;